In the link, there is a thread discussing replacing gen 1&2 Pokemon cart sram ICs with fram equivalents. The only differences between old and new ICs (besides architecture) is the operating voltage, so they leave Vdd floating. Isn't this a Very Bad Idea?

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    \$\begingroup\$ Posted here b/c what do average gamers know about such things \$\endgroup\$ Oct 11, 2015 at 23:43
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    \$\begingroup\$ The final post suggests using cypress.com/part/fm18w08-sg , which is both 5V and 3V tolerant. Unfortunately it costs $15. Cheaper alternatives may exist. \$\endgroup\$
    – pjc50
    Oct 12, 2015 at 9:03
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    \$\begingroup\$ No, we're not going to follow a link to get essential information about the question. -1 for the laziness and poor question, and closing because this seems like a consumer-level electronics question anyway. \$\endgroup\$ Oct 12, 2015 at 11:57
  • \$\begingroup\$ @pjc50 That part's discontinued on digikey. But the 3V3 one isn't... \$\endgroup\$ Oct 12, 2015 at 14:24
  • \$\begingroup\$ @Olin Lathrop: agree in general with including as much info as possible, but "leave Vdd floating" was enough to see this is a bad idea (as detailed in the answer below). \$\endgroup\$ Oct 24, 2015 at 2:11

1 Answer 1


It is indeed a very bad idea. The reason this is 'working' is that the device must be being powered through the input protection diodes. Provided at least one input with such a diode is high, the device will be powered up, provided the source of power (a signal line) can supply the necessary current.

I have had this in the past where a Vcc track broke on a particular board, and on random occasions, the device (a port expander) would lose its register settings; that was when all inputs went low and therefore no power is applied to the device. At the next power up (when a line went high), the registers came up to their default state.

At some point, this will happen in this scenario.

Note also that the original SRAM is likely a 5V part in a 5V system (which would probably be why the Vdd pin was left disconnected), so the source(s) providing power are pulling the internal power rail to about 4.7V (the datasheet implies schottky devices on the inputs), which will shorten the life of the FRAM and whatever is powering it.

Update: Added note on retention and timing

Note that data successfully saved will still be there (that is the whole point of FRAM), but a save that includes all lines low at some instant may well be corrupt. The note on voltage levels is still valid.

The new and old devices very probably have slightly different timing requirements, although FRAM is billed as a drop-in replacement for SRAM. This person is fortunate that the timings are close enough that data transfer is still successful.

[Update] Added note about a bypass cap

Although a bypass capacitor might help, my point is that this circuit is working more by luck than judgement. A bypass cap would need to be charged from the source (a signal line) and could easily overstress the input protection diode that is feeding the internal Vdd rail; whether that happens would be dependent on the source resistance of the signal(s) powering the device at any instant.

These protection diodes are not usually rated for more than a few 10s of milliamps, and are therefore susceptible to damage if they were in a charging path for a capacitor.


  • \$\begingroup\$ Add 'bypass' cap from Vdd to GND? It would power the rail when all inputs are low, and charge when and input is high. \$\endgroup\$ Oct 12, 2015 at 14:25

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