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When a reverse bias voltage is applied between the gate and the source, depletion layer is formed between the p-type and n-type materials in the JFET. My question is why isn't it symmetrical? Why does it move more towards the drain than towards the source?

Also, my text book tells that this happens because there is more voltage drop near the drain than near the source. Please explain this statement also.

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  • \$\begingroup\$ The thickness of the depletion layer depends on the doping of the layer. More doping means a thinner depletion layer. \$\endgroup\$ Oct 12, 2015 at 15:09

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why isn't it symmetrical?

Take a look at this: -

enter image description here

Because the drain is more positively biased than the source, the depletion around the drain end of the device has to be "more" for any given gate voltage. More reverse bias equals bigger depletion layer. Clearly the picture isn't perfect because there will still be a depletion layer between gate and source but hopefully you get the general idea.

This is probably a more accurate picture: -

enter image description here

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