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I'm designing a very-low-power, i.e. less than 5 uA device, that requires external inputs. These inputs need to be protected against over-voltage. The allowed range is about -0.1 V to 3.0 V. If necessary, I can live with a top voltage that is limited at a value as low as 2.8 V and as high as 4.0 V, so at least there is some flexibility.

The whole device has a power source at a somewhat higher voltage and a step-down converter to a system voltage at 3.0 V, so I could in general just add a protection diode to that 3.0 V system voltage, accept that the limit is increased to at most 4 V and be done with it. Sadly, I can not limit the current through this diode to the point, where the device would just sink that, as the device itself only consumes about 5 uA and there may be up to 1 mA of current through that diode:

schematic

simulate this circuit – Schematic created using CircuitLab

So, instead I would prefer to have some other means to limit that voltage. The typical approach here is to use a Zener diode to ground, bypassing the system itself. Of course that also fails, as there are no Zener diodes with a sharp enough knee in that voltage range to ensure that there is voltage limitation above, say, 3.5 V and very low current consumption below 2.8 V, which is kind of required for this circuit to function. I also can not add a resistor divider before the input and then use a Zener diode with a higher Zener voltage, because that would create a pull-down which in conjunction with an additional pull-up, would greatly increase current consumption at the permissible resitance range.

So, the last solution I see is some more complex method of limiting the voltage. The approach I prefer is some sort of shunt regulation. I did not find any shunt regulators sufficiently low-power for my needs, like the ALD111933, which is a trimmed-threshold FET pair. With it, I could create a circuit like this:

schematic

simulate this circuit

Do you see a particular problem with this? There is no need to filter out extremely fast transients, another mechanism will take care about that.

Are there any alternatives? I thought about low-power operational amplifiers, but they have such low bandwidths, that even with the transient filter, they would be too slow.

Also, the only really acceptably trimmed FETs seem to be from that manufacturer. Are there others, that I just can not find?

Edit: I've kept the actual signal on the input hidden, sorry for that. The reason for it is, that it can be quite diverse. In general, it should be a digital or analog signal between 0 V and 2.8 V; analog signals at a bandwidth of less than 100 Hz, digital signals up to 10 kHz. There are no protection diodes in BUF1, which has an absolute maximum at to 4.3 V. In case of errors that may occur during normal operation, I have to expect voltages up to about 8 or 9 V. In case of severe errors, that should not occur, but would be nice to withstand, the voltage may rise to up to 30 V at the input. I can also scale R1 appropriately, selecting low-leakage diodes. BUF1 also has very low leakage current, so R1 would be around 200 kOhm.

Edit: Another small clarification: I'm not just interested in blocking transients. It may be necessary to allow a over-voltage to be applied over the duration of days until the fault can be fixed.

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  • \$\begingroup\$ What extremes of voltage can be present on the signal attached to your input. What is the nature of the actual signal i.e. frequencies, normal voltage levels etc.? What is the maximum input current that BUF1 can take without damage? \$\endgroup\$ – Andy aka Oct 18 '15 at 10:48
  • \$\begingroup\$ The ALD111933 won't do what you think it should - protection levels of 10V might be obtainable. \$\endgroup\$ – Andy aka Oct 18 '15 at 10:54
  • \$\begingroup\$ I see your edit but what device is BUF1 - and what over-current can it take at the inputs AND, I say again, what are the peak signals that may come along. Without knowing these facts nobody can help your realistically. \$\endgroup\$ – Andy aka Oct 18 '15 at 10:56
  • \$\begingroup\$ @Andy: Sorry, I was about to add them. I tend to save my edits a bit early. ;) I, sadly, am not at liberty to describe BUF1 in more detail. \$\endgroup\$ – J A Oct 18 '15 at 10:57
  • \$\begingroup\$ Did you notice this app note? aldinc.compdf/… \$\endgroup\$ – user96819 Jan 11 '16 at 21:22
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R1 would be around 200 kOhm.

If R1 is 200 kohm and the worst case over-voltage is 30V then the worst case over-current into the unprotected input of BUF1 is: -

(30 volts - 3 volts) / 200k = 135 uA.

If BUF1 has a spec that tells you the maximum input current I'd make a small bet that it's several times the figure I've just calculated.

If this is true then R1 is all you need for protecting the input.

The ALD111933 won't do what you think it should - protection levels of 10V might be obtainable. For a start it doesn't start switching on until the gate is at 3.3 volts then it's only guaranteed to conduct 1 uA. With a gate voltage of 7.3 volts Id is specified at 3mA. Do you see the problem of this type of circuit?

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  • \$\begingroup\$ Thank you for that suggestion. That would require BUF1 to have some method of sinking that current, such as input protection diodes, which then also might go onto the 3.0 V system rail. It neither has input protection diodes (I just added that in an edit) nor can I allow that current to flow into the 3.0 V rail. \$\endgroup\$ – J A Oct 18 '15 at 11:04
  • \$\begingroup\$ Why can't the 135 uA flow into the rail - this is normally what happens with overvoltages - it's not like you will be taking energy away from something that is needed to be kept powered up. For instance, a capacitor on the power rail of a few microfards would soak that current up and hardly increase the supply voltage (dependent on the length of the transient). \$\endgroup\$ – Andy aka Oct 18 '15 at 11:09
  • \$\begingroup\$ Yes, a valid point for transients. For ESD protection, that would probably sufficient. I'm not just talking about transients. There may be a fault where that voltage is applied over the duration of several days. Thanks for pointing out the gain issue. I might just add another pmos stage afterwards. \$\endgroup\$ – J A Oct 18 '15 at 11:10

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