1
\$\begingroup\$

The circuit below shows 3 capacitors in parallel on the input side, and 2 on the output side. Is there a reason for that? or would using a single capacitor (30uF & 660uF) make no difference?

enter image description here

\$\endgroup\$
  • 2
    \$\begingroup\$ Parasitic inductance tends to be larger on larger capacitors. \$\endgroup\$ – Ben Voigt Oct 18 '15 at 15:14
  • 3
    \$\begingroup\$ EEVBlog did a nice job explaining similar situation (but with electrolythic capacitors): youtube.com/watch?v=wwANKw36Mjw \$\endgroup\$ – Golaž Oct 18 '15 at 15:27
1
\$\begingroup\$

Besides the electrical characteristics of the capacitors there are often considerations on physical size and body style of capacitors to take into account. Some capacitor values are not available in SMT for example. Another consideration would be mounted height above the board where boards are closely mounted to a case, cover or another circuit board.

\$\endgroup\$
  • 1
    \$\begingroup\$ Also the schematic makes it seem like the capacitors are physically side by side, but that is not necessarily the case. And depending on usage you might get some protection against catastrophic failure in case of a single cap. failure (open capacitor). \$\endgroup\$ – user3169 Oct 18 '15 at 18:16

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.