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I have designed a current measurement circuit which measures voltage across a shunt resistor. The voltage is basically measured with an instrumentation amplifier and the ouput its connected to the inputs of an 18-bit analog-to-digital converter.

To get an idea of how much noise is present in the samples, I made the ADC convert a lot of samples (65536 samples to be precise) when no current flows through the resistor. I expected the distribution of the samples to be like a normal distribution. However, the result looked like this (figure 1):

Distribution of ADC output values at zero input current

The mean is 131085 (close to 131072 which is half of the full-scale range) so that is OK (the interface amplifiers have offset errors etc). But the standard deviation is 22.05 which is not very good. The worst thing is that the distribution have two humps (I found out that this is called a bimodal distribution). I am by no means an expert in statistics and would like to know from a more "electronic" point of view, what could cause this distribution? Inadequate filtering? Bias currents in the instrumentation amplifier inputs?

The circuit is part of a bigger circuit which also includes a voltage measurement interface. This interface uses the same ADC and the same good PCB-layout and both ADCs have appropriate buffering and filtering of the reference voltage. I did a similar experiment with this, very similar circuit, and the result is more what I expected (figure 2):

Distribution of ADC output values at zero input voltage

In this case, the mean is 131090 and the standard deviation is 2.52837. Much better.

The only real difference in the two circuits would be the instrumentation amplifier in the current measurement circuit which is not present in the voltage measurement circuit. The amplifier is a regular 3-opamp-based instrumentation amplifier set to a voltage gain of 10. Could this be the source of the "weird" distribution? The distribution seems quite symmetrical although it is bimodal. I fear that filtering will only reduce the deviation but will keep the distribution shape.

Is this normal with instrumentation amplifiers or could the problem be somewhere else?

Thanks in advance for any ideas on what could be wrong.

(BTW, I am not going to post any schematics since this is a more like a general question and I expect ideas to where to problem could be, not a complete solution. Thanks :-)

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  • \$\begingroup\$ The distribution suggests that there are two sets of conditions. Set one produces the peak on the left, and set two produces the peak on the right. You say it is measuring current. It may be that sometimes the current is high and sometimes it is low. Another possibility is that some other signal is somehow feeding in to the ADC node or the reference. I would not be too hasty to blame the amplifier, though it is certainly possible. \$\endgroup\$ – mkeith Oct 20 '15 at 22:20
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    \$\begingroup\$ By the way, the standard deviation is a statistic that applies to normal distributions. Once you KNOW the distribution is not normal, the standard deviation is not meaningful in predicting the probability of an outlier. Just FYI. In a normal distribution, the average is the most likely result. In your bimodal distribution, the average is relatively unlikely. You might want to use the range (max - min) instead of the standard deviation. \$\endgroup\$ – mkeith Oct 20 '15 at 22:27
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    \$\begingroup\$ Integral non-linearity error in the ADC? \$\endgroup\$ – Andy aka Oct 20 '15 at 22:42
  • \$\begingroup\$ You need to read up how to debug an ADC. Not easy. www-inst.eecs.berkeley.edu/~ee247/fa04/fa04/lectures/…, www-inst.eecs.berkeley.edu/~ee247/fa04/fa04/lectures/… \$\endgroup\$ – Fizz Oct 21 '15 at 9:55
  • \$\begingroup\$ A slightly distorted sine wave (with flattened peaks) would have a distribution similar to this. It would also have a relatively simple explanation, especially if its frequency turns out to be 50 or 60Hz... \$\endgroup\$ – Brian Drummond Oct 21 '15 at 13:19
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What kind of voltage source is your resistor connected to? My first guess would be that the source your resistor to has some square wave signal present in it.

Are you properly decoupling your power supply? Is the power supply the same in both of the two experiments you described?

Perhaps your instrumentation amplifier does not have good power supply noise rejection.

What is the voltage reference of your ADC?

Do you have access to an oscilloscope? It would be interesting to look at the output of your instrumentation op amp to see if there is any noise in the signal.

Have you tried changing the voltage level (to something other than half-supply)? That shouldn't change your results - but if it did that would be interesting and it would be very useful information.

I understand you are not going to post any schematics; I strongly disagree with the decision.

Edit:

Turn up the gain of your instrumentation amplifier. If you see a wider distribution, this could imply the bimodal signal is entering your measurement before or at your instrumentation amp. If you don't see a change in the distribution, you may conclude that the error is entering your measurement at or after the amplifier.

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  • \$\begingroup\$ Yes, a square wave somewhere seems like a good explanation. The Voltage amplitude of the square wave at the ADC input can be inferred from the separation of the two peaks. I would definitely put an oscilloscope probe on the ADC input, and set it to AC coupling and see what I could see. \$\endgroup\$ – mkeith Oct 20 '15 at 22:32
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    \$\begingroup\$ Seeing 18-bit ADC noise with an oscilloscope might be hard, but instead of looking just at the statistic of the samples maybe plotting them over time might give an insight already - or doing a FFT and see what kind of frequencies are there (FFT can be quite impressive even when the eye doesn't see any frequencies anymore). \$\endgroup\$ – Arsenal Oct 20 '15 at 23:12
  • \$\begingroup\$ Arsenal makes a very good point. If the distribution is being caused by some oscillator in your circuit, then you should be able to see the oscillator (or at the very least some alias of it) in your data. This assumes that the oscillator and your digital clock are stable with respect to each other, but that isn't too big a leap of faith. \$\endgroup\$ – Ryan Jensen Oct 21 '15 at 0:25
  • \$\begingroup\$ His ADC output seems to look a bit like the one in Fig 3 here. He use a similar, but not the exact same one to get the ok-ish distribution. \$\endgroup\$ – Fizz Oct 21 '15 at 10:05
  • \$\begingroup\$ Thanks a lot for your ideas. I think my voltage source connected to the shunt resistor might be the problem. I will need to do some more measurements at different voltages and see what the distributions looks like. \$\endgroup\$ – pvh1987 Oct 22 '15 at 12:28
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Some possible causes.

  1. a readout problem. For example a bit reading randomly due to not being connected properly, a swapping of bits in the wiring of the ADC or a timing issue on a serial interface causing occasional mi-reads of a particular bit. If your peaks are seperated by a power of 2 i'd be suspecting this.
  2. a non-random interference signal on the analog side. It might be interesting to look at a time-plot of the samples or even do a Fourier transform and look at a frequency plot.
  3. a faulty ADC.
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