When generating PWM wave, shall I minimize switching or maximizing it?

Question

For instance, for a 50% duty cycle, what's the advantage/disadvantage of using 01010101 rather than 00001111?

Answer 1

As in so many engineering questions, the answer is "it depends".

Suppose you are just generating a voltage by filtering the PWM. In that case, the cost of switching is very low and you will get less ripple in the output by using your first example.

However, in the case of PWM to a massive load, perhaps using relatively slow-switching devices such as IGBTs, the cost of each switch transition is high and you may wish to minimize switch transitions- perhaps even to the point of using "magic sinewaves".

Answer 2

In many cases, a device which is being controlled by a PWM signal will effectively lengthen or shorten pulses by some unpredictable amount. If one has the ability to turn the output on or off once per microsecond and a device may arbitrarily lengthen or shorten each pulse by up to 100ns, then a sequence of PWM output patterns which successively has 1, 2, 3, or 4 separate "1" intervals per 8us interval, and then 3, 2, or 1 separate "0" intervals per 8us interval, would yield average output values (in eights) of

1 +/- 0.1 = 0.9 to 1.1
2 +/- 0.2 = 1.8 to 2.2
3 +/- 0.3 = 2.7 to 3.3
4 +/- 0.4 = 3.6 to 4.4
5 +/- 0.3 = 4.7 to 5.3
6 +/- 0.2 = 5.8 to 6.2
7 +/- 0.1 = 6.9 to 7.1

There's a rather nasty bit of uncertainty in the middle, and if the device tends to ride the high or low side of the range the outputs will be decidedly non-linear. By contrast, if one only has one rising edge and one falling edge per 8us interval the output values would be:

1 +/- 0.1 = 0.9 to 1.1
2 +/- 0.1 = 1.9 to 2.1
3 +/- 0.1 = 2.9 to 3.1
4 +/- 0.1 = 3.9 to 4.1
5 +/- 0.1 = 4.9 to 5.1
6 +/- 0.1 = 5.9 to 6.1
7 +/- 0.1 = 6.9 to 7.1

Much more predictable, and much less likely to introduce non-linearity.

Reducing switching will thus minimize some kinds of non-linearity and unpredictability in the output response, but will also increase the amount of low-frequency content in the output, which may be harder to filter than high-frequency content would be.

A hybrid approach which may be useful if one e.g. wanted to output about 225 distinct PWM values using a 1us sampling clock but one wanted to minimize the amount of frequency content below 50Khz would be to have every 256us interval contain 16 groups of consecutive 1's, which could vary in length by 1us. The lowest output level (code 16) would have sixteen 1us pulses every 256us; the next higher value would have fifteen 1us pulses and one 2us pulse. The next would have seven 1us pulses, then a 2us pulse, then seven 1us pulses, then a 2us pulse. The next would have five 1us, one 2us, four 1us, one 2us, four 1us, one 2us. So long as one only uses code values within the middle 14/16 of the range, this approach would yield consistent linear behaviors while minimizing the amount of lower-frequency content. I don't know why I never see hardware to implement this, but it's certainly workable in software.