Why would somebody be bothered to set
Clock Polarity and
Clock Phase for an SPI Master? Is this about the compatibility for Slave device? Is this somehow helping something? Why does it matter if the data is transferred on
Rising Edge or
Falling Edge ?
The Polarity and Phase Parameter is generally determined by the specification of the slave. SPI generally allows all four combinations to function on the same bus.
Slave device designers are more or less free to choose among the 4 modes, and this choice is often hard-coded in the slave hardware. So you need to read the slave datasheet to figure out what CPOL and CPHA parameter they use (It may not be explicitly stated but will be shown in the timing diagram)
If you use the incorrect mode with a given slave you will likely get missed bits, or no communication at all. It is common for the SPI bus peripheral on the MCU to have registers or to control CPOL and CPHA as well as keeping track of CPOL and CPHA for different slaves which could also be done by an OS driver.