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Is it generally a bad idea, in simple or moderately heavy circuits, having two layers, to have a power plane in the top and a ground plane on the bottom?

The tracing would become much easier, there wont be virtually any noise, better heat dissipation and aesthetically the circuit would be layed out neatly.

Also, is there any handy guide to refer, when to use a thicker trace for different values of current?

Thanks.

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  • \$\begingroup\$ No it's not a bad idea for most circuits. Regards the handy guide - this solicits opinions and opinions are not good answers for this type of site. \$\endgroup\$ – Andy aka Oct 24 '15 at 12:16
  • \$\begingroup\$ It depends...there are AC power lines, analogue signals, digital signals, power trails, RF signal paths and so on...Every one of this have a dedicated ground strategy, and a combined method, that is reflected to number of layers as well as the orientation of this layers. \$\endgroup\$ – GR Tech Oct 24 '15 at 12:18
  • \$\begingroup\$ Hey I understand opinion may attract criticism. But I really wanted some kind of a "Rule of Thumbs Guide on Layout". Anything you can refer to? I wan to learn more. Most of the youtube videos are just plain boring. Nothing informative. Just too much talking. \$\endgroup\$ – phenomenon Oct 24 '15 at 12:27
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    \$\begingroup\$ I am going to ask you to clarify what you mean by top and bottom. To me, top and bottom are just labels. To you, is the top the side where all the components go? If your components are mostly surface mount, and you put them all on one side, it makes much more sense to put GND on the OTHER side because it will have a continuous unbroken expanse of copper. If you put lots of SMT components on both sides, then it doesn't really matter. Also, if all your components are through-hole, then putting GND on the component side is probably OK. \$\endgroup\$ – mkeith Oct 24 '15 at 17:16
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    \$\begingroup\$ Power plane on the top layer and ground plane on the bottom layer. \$\endgroup\$ – phenomenon Oct 25 '15 at 6:04
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Well, I suppose this is one of those topics where opinions may vary. Hower it's somewhat useful to hear opinions backed up by some kind of logic/argument. So here's one from http://www.ti.com/lit/ml/sloa089/sloa089.pdf

There has been a lot of confusion in the past over what is the optimum order for PCB layers. Take, for example, a 4-layer board consisting of two signal layers, a power plane, and a ground plane. Is it better to route the signal traces between the layers, thus providing shielding for the signal traces – or is it better to make the ground and power planes the two inner planes?

In considering this question, it is important to remember that no matter what is decided, there will still be signals exposed on one or both of the top and bottom planes. The leads of the op amp PCB package, and the traces on the board leading to nearby passive components and feed-throughs will be exposed. Therefore, any shielding effects are compromised. It is far better to take advantage of the distributed capacitance between the power and ground plane by making them internal.

Another advantage of placing the planes internally is that the signal traces are available for probing and modification on the top and bottom layers. Anyone who has had to change connections on buried traces will appreciate this feature.

For more than four layers, it is a general rule to shield higher speed signals between the ground and power planes, and route slower signals on the outer layers.

Hope this helps.

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I do this all the time, ground planes and power planes are very useful in a lot of boards. It not only makes routing easier, but also helps with signal quality if you're using high frequency signals. You'll want to pick your planes wisely though, I would recommend a ground plane to be on the same side as high frequency signals to ensure there is a nice, short return path.

What you're looking for when you mention trace width/current is in the IPC-2221 standards. There are lots of calculators out on the web, like this one:

http://www.4pcb.com/trace-width-calculator.html

You enter your current and it tells you the minimum trace width for that current.

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  • \$\begingroup\$ IPC-2221 is outdated. It's very conservative. IPC-2154 is more recent. \$\endgroup\$ – efox29 Oct 24 '15 at 12:54
  • \$\begingroup\$ What is that thickness in the inputs of that calculator? \$\endgroup\$ – phenomenon Oct 24 '15 at 13:12
  • \$\begingroup\$ @phenomenon the weight of the copper or height. \$\endgroup\$ – efox29 Oct 24 '15 at 13:35
  • \$\begingroup\$ @efox29 IPC-2221 is still commonly used by many engineering companies including where I work, and I have not seen anything to suggest it has become obsolete. It covers a lot but usually when designing for mass production you really want to be conservative. \$\endgroup\$ – DerStrom8 Oct 24 '15 at 19:17
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This is probably the norm instead of a bad idea. At least for a 4-layer board you effectively have a board-sized decoupling capacitor, and it makes signal routing all easier.

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  • \$\begingroup\$ Though for a two layer board, the amount of capacitance is pretty small. Even if you were to fill a 10cm x 16cm standard 1.6mm thick FR4 PCB entirely with a power plane on one side an a ground plane on the other, you would have <500pF of capacitance. Once the plane is broken up by components and traces or the board gets smaller, that amount goes down probably to next to nothing. \$\endgroup\$ – Tom Carpenter Oct 25 '15 at 4:27
  • \$\begingroup\$ I do not think for most 4 layer boards (62 mils thickness) the inner plane (layer 2 -3 ) is sufficient enough for decoupling, unless the planes are separated less than 10 mils. Basically the inner planes are ineffective at decoupling and majority of decoupling happens through the caps near the ICs \$\endgroup\$ – efox29 Nov 12 '15 at 11:51

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