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I wonder how you can achieve that a GPIO pin accuratly toggles according to a certain pattern. This pattern is fully variable (no PWM) and is stored in memory.

My conclusion of this is:

  • The pin has to be set/reset by hardware, not in an ISR
  • DMA is needed for data transport

What I have in mind:

  • Upcounting Timer
  • DMA Channel for updating ARR with pattern data
  • Compare Channel for toggling pin
  • Second DMA Channel for updating the compare channel register with same pattern data at the same time

Could that work? Or is there an easy way to do this?

If this works, could I use a second compare and a third DMA channel to toggle another pin invert to the first one?

Facts and requirements:

  • A 72 Mhz Crystal drives the STM32
  • Minimum pulse is 10 us
  • Tolerarable Jitter is less than 100 ns
  • Duration of longest ISR is greater than 100 ns
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  • 1
    \$\begingroup\$ This entirely depends on what you mean by accurately. Some clock cycles are probably needed each time you toggle the pin, you can't go much further than that. \$\endgroup\$ – Vladimir Cravero Oct 25 '15 at 20:41
  • \$\begingroup\$ If you put the toggle algorithm in an isr, you (could) have two problems: other isr could cause jitter and the processer could be too busy \$\endgroup\$ – ThiloF Oct 25 '15 at 21:33
  • \$\begingroup\$ What accuracy and time periods does the application require? \$\endgroup\$ – gbulmer Oct 25 '15 at 23:11
  • \$\begingroup\$ what about using some serial communication, like SPI. Fill the buffer with DMA and data are sent continously. Of course I don't know if it can send arbitrary sequence. \$\endgroup\$ – Marko Buršič Oct 26 '15 at 10:51
  • \$\begingroup\$ I have updatet the question with a facts and requirement section. \$\endgroup\$ – ThiloF Oct 28 '15 at 8:17
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IIRC, STM32 DMA transfers run at 1/4 system clock. So, this will set a lower bound on precision.

Further, multiple overlapping DMA sequences could jitter each other. You may have enough flexibility to control this, and prevent it having any negative effect.

Also, depending on where in the cycle it is updated, some STM32 timers have a buffer register between an update being written, and it actually taking place. You have some control over the configuration of the timer, and maybe the device, so you may be able to prevent this causing any negative effect.

A further issue is ensuring the data is set up by the processor. Again, you may have enough control to prevent this causing any negative effect.

If the lower bound on precision is an issue, trying to building a prototype, and doing some measurements, might give you enough detailed information to prove it can be done. However, if it is accuracy but not very small periods of time, i.e. sub microsecond, it can likely be made to work.

Summary:
The DMA rate sets a lower bound on precision, and setting up data using the processor might also be a significant obstacle if it needs short durations. Other issues exist, which you'll need to resolve. Accuracy without tiny periods is likely doable.

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