I have been given this task to design a single 8x4 memory chip using only 2x1 memory chips. I have been searching everywhere on google for some decent information or example of how this is done, but sadly came up empty handed. Can anyone please help me out or at least point me in the right direction?
You can combine memories to make either wider (more data bits) memories, deeper memories (more addresses) memories or both.
Making a wider memory is easy. You just connect the address and control lines on all the memories together, then split the data bus or buses between memory chips.
Making deeper memories involves using the high address bits to select between memories. How exactly that selection process will work and what circuitry is needed to accomplish it depends on what interface your memories have. With standalone SRAM chips with bidirectional tristatable data buses it's normally done using a "1 of n" decoder to feed "chip enable" lines on the memories. Address and data lines can then be wired in parallel. On memory blocks like those found inside FPGAs it will likely involve a 1 of n decoder for writes and a multiplexer for reads.
You can combine the techniques to make a memory that is both wider and deeper than it's individual components.