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I have been given this task to design a single 8x4 memory chip using only 2x1 memory chips. I have been searching everywhere on google for some decent information or example of how this is done, but sadly came up empty handed. Can anyone please help me out or at least point me in the right direction?

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    \$\begingroup\$ The number of times this question (or one very similar) gets asked is astonishing. Use the search box up there .^ \$\endgroup\$ Oct 27, 2015 at 23:14
  • \$\begingroup\$ For homework, you should note that it is homework and also show what you've tried already. \$\endgroup\$
    – Samuel
    Oct 27, 2015 at 23:14
  • \$\begingroup\$ @TomCarpenter yes, I have used the search bar, if you would read the question i stated that i have searched anywhere but not been able to gather any help, are people in this community here to help or just rag on the people that are legitmitely seeking help? \$\endgroup\$ Oct 27, 2015 at 23:18
  • \$\begingroup\$ @TomCarpenter the answer to that question was not helpful whatsoever for me \$\endgroup\$ Oct 27, 2015 at 23:19
  • \$\begingroup\$ In 20 seconds I found that... \$\endgroup\$ Oct 27, 2015 at 23:19

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You can combine memories to make either wider (more data bits) memories, deeper memories (more addresses) memories or both.

Making a wider memory is easy. You just connect the address and control lines on all the memories together, then split the data bus or buses between memory chips.

Making deeper memories involves using the high address bits to select between memories. How exactly that selection process will work and what circuitry is needed to accomplish it depends on what interface your memories have. With standalone SRAM chips with bidirectional tristatable data buses it's normally done using a "1 of n" decoder to feed "chip enable" lines on the memories. Address and data lines can then be wired in parallel. On memory blocks like those found inside FPGAs it will likely involve a 1 of n decoder for writes and a multiplexer for reads.

You can combine the techniques to make a memory that is both wider and deeper than it's individual components.

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