I am bit new to VHDL, and hope some of you guys could help me here.
I trying to establish a connection between an ADC, LED, and control component.
The purpose of this application is to convert an analog value measured on the ADC, and then output to the LED.
The way i've designed the communication is as follows.
The LED set and signal high (
start_adc) Which the ADC read, and start the ADC.
When the ADC is done, it sets the signal
read high, which Control then reads, and then read the
ADC_value ( a binary value - std_logic_vector (9 down to 0)).
ADC_value is kept within control, but the LED has to change its state. So Control set the signal
next_state high, which LED reads and changes its state to something else. The problem here is how do i turn off
My solution entailed the use of a signal named
received which would be set high, if an
rising_egde(next_state)was seen such that, if control saw an
rising_edge(received), it could then turn off
next_stateand then when LED shaw and
falling_edge(next_state) it could set
received low again, and then
code wise it looks like this
state_changer: process(clk,state) variable count: integer range 0 to 500000000 :=0; begin if falling_edge(next_state) then received <= '0'; start_adc <= '1'; elsif rising_edge(next_state) then received <= '1'; count := 0; start_adc <= '0'; end if; count := count +1; end process;
but as you can see the problem is that the same signal is set either at rising and falling.. how do I work around this issue?..
count is also important.