# Finite state machine (FSM) that controls a memory block

I have to Implement a finite state machine (FSM) that controls a block memory. The FSM receives two inputs, indicating ready when the memory is prepared, read / write (r_w) indicating whether you want to perform a read or write and a reset signal. The FSM generates two variables, oe and we that are the "output enable" and "write enable" of the memory block.

So far I made the state transition diagram and the table of output variables depending on the condition but I'm not sure how can I design the circuit with it

• The system appears to have three input signals, not two as your question states. The input signals appear to be RESET, READY and r_w. – gbulmer Oct 29 '15 at 3:37

First thing is you need some registers to hold the current state. So you need to determine the number of registers you are going to need - there are two options, you do a one-hot mapping (where there is one register for each state) or you use a counter-like arrangement where you have $\mathrm{ceil}(\log_2(states))$ registers.
Next you need to make a Karnaugh Map for each of the registers to determine the logic that makes them move to the next state based. The input of the map is the current state (all of the state registers), and any other inputs, e.g. r_w, Reset, etc.
Finally you need to make some more Karnaugh Maps for each of your two outputs (oe and we). For these you use the state registers as the input to the map.