# How could this transistor be in saturation?

For this RTL circuit (RTL inverter with active pull-up):

The textbook says that in the output high state, Qp is in saturation and the circuit looks like:

I wonder how this is possible? $$Rcp = Rc/10$$ and usually $$R_B > R_C$$ so we expect that the voltage at the base is less than the voltage at the collector. And for saturation, we need $$V_{BC} = 0.6V$$

• I agree - it seems misleading what your text book says. At best you could say Vb and Vc are the same voltage so it's borderline. – Andy aka Oct 30 '15 at 17:50
• Does that mean that all of the textbook (Digital Integrated Circuits, DeMassa and Ciccone) analysis that builds on that to calculate the maximum fan-out of the circuit is wrong? – ammar Oct 30 '15 at 18:14
• Never read it so I can't possibly comment. – Andy aka Oct 30 '15 at 18:18
• Take a guess of the gain of Qp. For example, use 100 just to see what happens. Now estimate/calculate Ic vs Ib when Vout is loaded (per the maximum fan-out for example), then Vc vs Vb. – rioraxe Oct 31 '15 at 1:37