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Background
I have created a VHDL module that continuously generates a one-bit wide pattern of "1010101010..." as long as it's enable bit input is asserted high, as part of a class assignment. In the description of the assignment, the justification given for creating this module is that they are used in many devices, and an example is the Ethernet I1 preamble, which consists of eight repeating octets of "10101010".

Here is my simulation result:

simulation results

The Question
I understand the usefulness of the preamble for synchronizing packets, but I got the impression from my instructor's description that hardware designers will write modules like this to generate this pattern without referring to it as a "clock divider", even though it essentially is one. Why not just call it a clock divider instead of a "preamble_generator" or other such names?

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  • \$\begingroup\$ I don't understand the question. The module IS a clock divider with an enable bit. What two things are you trying to make a distinction between? \$\endgroup\$ – Dave Tweed Oct 31 '15 at 22:54
  • \$\begingroup\$ @DaveTweed That's kind of my point. I got the impression from my instructor's description that hardware designers will write modules to generate this pattern without referring to it as a "clock divider" even though it essentially is one. I suppose this is as much a software development question as it is a hardware design one: why not just call it a clock divider instead of a "preamble generator" or other such names? \$\endgroup\$ – skrrgwasme Oct 31 '15 at 23:05
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    \$\begingroup\$ It's all about the context of the larger application. "Clock divider" implies to me that the output will also be used as a clock, or maybe a clock enable signal. "Preamble generator" implies that the output will be used as data. This is a fairly trivial example, but in more complex projects, meaningful names can go a long way toward making a design understandable to another person. \$\endgroup\$ – Dave Tweed Oct 31 '15 at 23:15
  • \$\begingroup\$ @DaveTweed Yup... that makes perfect sense to me. If you put that as an answer I'll accept it. I'll rephrase the question a bit to reflect my previous comment. \$\endgroup\$ – skrrgwasme Oct 31 '15 at 23:17
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It's all about the context of the larger application. "Clock divider" implies to me that the output will also be used as a clock, or maybe a clock enable signal. "Preamble generator" implies that the output will be used as data. This is a fairly trivial example, but in more complex projects, meaningful names can go a long way toward making a design understandable to another person.

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I would like to point out that a clock divider would imply multiple clock domains, something you might not want to do in high speed design. In the high speed design, logic changes state on a clock edge. Adding what can be viewed as another clock can make routing and performance more difficult.

The preamble generator is more an accurate description of the logic

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  • \$\begingroup\$ The last sentence of this seems like an answer, but the rest of it makes it sound like a comment. I would suggest you rephrase it so it doesn't get flagged as "not an answer." \$\endgroup\$ – skrrgwasme Oct 31 '15 at 23:22

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