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So some Cortex-M3 CPUs (and most other small CPUs as well) have a non maskable interrupt.

I know what the NMI does, but I don't quite understand why I ever would want to use one.

I'm looking for practical examples where the non maskable nature of the NMI makes sense and is a improvement over other external interrupt sources such as GPIO or EXT interrupts.

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Well as the name suggests. Non Maskable Interrupt (can't switch off or disable). It is for interrupts that are very important and should not be ignored. So it all depends on what you are using the chip for and what you would consider very important and can't be ignored.

So simple example is perhaps main power about to go down or going down so ignore what ever you are doing and save buffers to flash ram then perform a clean shutdown. Some micro systems have a super cap to hold main power for a short while extra after battery or regulator power dies.

Another might be in a heart beat monitor for surgical theater use. If the signal from the lead appears to vanish because the lead as disconnected or the patient is in trouble your micro runtime may need to indicate via an alarm of this situation. You don't want this ignored because the firmware is drawing fancy time expensive graphics on the monitor graphing moving average results etc.

I am sure that you can think of one or twp others. When designing your system not only do you have to decide the priority of interrupts as who can interrupt whom but which critical events can be wired in to interrupt anyone.

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