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Is there any significant architectural difference between non-inverting and inverting tri-state buffers? In what cases would it be advantageous to use one over the other? To me they seem like the same thing just differing by an inverter.

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  • \$\begingroup\$ Here is one possible advantage of inverting buffers. A buffer may have different rising and falling delay (\$t_{PLH},t_{PHL}\$), sometimes called pulse skew. It is more so with older bipolar TTL logics. If an application calls for two buffers in series, one at each end of a bus for example, then the skews stack with two non-inverting buffers in series and the skews tend to cancel with two inverting buffers. \$\endgroup\$ – rioraxe Nov 5 '15 at 8:24
  • \$\begingroup\$ @rioraxe Is there any certain way in which an inverting tri-state is especially useful? \$\endgroup\$ – Jihoon Nov 6 '15 at 2:16
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Mostly, they are the same thing with or without an inverter.

Construction-wise, the simple buffer designs are naturally inverting, so the non-inverting ones have to have an extra layer of logic to invert the signal an additional time.

This leads to both larger silicon area and longer signal path through the inverter.

With both parameters historically being critical and with the inverting design often being slightly more versatile (you can use it as a buffer, tri-state, and/or an inverter), both options were offered.

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One inverts, and the other doesn't.

You would use the inverting type if you needed the buffered signals to be inverted, otherwise you'd use the non-inverting type.

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  • \$\begingroup\$ Are you asking about the transistor level? Otherwise it's just what Peter said. One inverts a signal and the other doesn't. \$\endgroup\$ – kgEE19 Nov 5 '15 at 3:01
  • \$\begingroup\$ Yes that is part of what I'm wondering about, in constructing a non-inverting tri-state, how are transistors used/placed differently than an inverting tri-state? And how does the inverted one produce a restored output whereas the non-inverted one does not? \$\endgroup\$ – Jihoon Nov 5 '15 at 3:19
  • \$\begingroup\$ One has an extra inverter stage in the signal path, usually it's the non-inverted one that has the extra inverter, thereby canceling out the inversion and giving the original signal. \$\endgroup\$ – Austin Nov 5 '15 at 8:04

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