Why Increasing Collector Voltage Reduces Collector-base Capacitance

I'm looking at some transistor radio circuits and the book I'm following makes the following statement with regard to AC gain: "By raising the DC voltage at the collector, the internal collector-base capacitances of the transistor are reduced".

Here's a circuit to help understand what's going on:

Here the author has killed the DC gain by placing an inductor in parallel with R2 whilst leaving the AC gain intact: collector reactance (L1||R2) / emitter reactance (C3||R3).

I have a reasonable grasp of the effect of Miller Capacitance on an inverting amplifier, where the inverted output acts negatively on the input. What I don't understand is why increasing the collector voltage acts to reduce collector-base capacitance.

Does the increase in current flowing through the collector-emitter junction have anything to do with it?

• What happens to the capacitance of a diode (PN junction) in reverse mode as a function of the (reverse) voltage ? This effect is used in varicap diodes but any PN junction exhibits this behaviour. Nov 5, 2015 at 13:07
• I have no idea. But, if you turn your question into a fully fledged answer, you'll have made my day. Nov 5, 2015 at 13:18
• Open your favorite textbook on semiconductor physics and look it up then ! If you want to be able to work with analog circuits, this is a thing you need to know and understand. It's not hard. Nov 5, 2015 at 13:19
• Is this the same as the "Miller Effect", or is that only on FETs? I've never quite understood it either. Nov 5, 2015 at 13:45
• Thanks for the hint @FakeMoustache, a quick search for varactors gave me the intuition I needed. Nov 5, 2015 at 13:49

As @FakeMoustache hinted in a comment to your question, the explanation lies in the behavior of a reverse-biased PN junction, because that's what Q1's collector-base junction is in your circuit.

From a macroscopic point of view any reverse-biased PN junction acts like a parallel-plate capacitor whose capacitance (called transition capacitance $C_T$) depends inversely on the reverse voltage $V_R$. The relationship is not linear, but it is approximately:

$$C_T = K \dfrac{1}{\sqrt{V_0 + V_R}}$$

where $V_0$ is the voltage gap created by the junction and $K$ is a constant.

EDIT

Struggling to remember the exact form of the formula (there are half a dozen of ways of writing down that relationship, depending on which physical parameters of the junction you want to emphasize) I found a more intuitive formula in this Google book:

$$C_T = \dfrac{C_0}{(1 + V_R)^n}$$

Note: That formula has an error in it (dimensional analysis debunks it). Probably $V_R$ is meant to be the relative voltage with respect to some reference. I guess the correct formula should be: $$C_T = \dfrac{C_0}{\left(1 + \dfrac{V_R}{V_0}\right)^n}$$

where $C_0$ is the capacitance when no bias is applied and $n$ depends on how the junction is doped: $n = \frac 1 2$ for step-graded junctions, whereas $n=\frac 1 3$ for linearly-graded junctions.

Another interesting article on the subject (tougher semiconductor physics stuff) explains how to derive that relationship (in yet another form!).

• Yep, @FakeMoustache put me on the right track and for those interested the images in this link (en.wikipedia.org/wiki/Varicap) give you a fair idea of what's happening. Nov 5, 2015 at 13:52
• Exactly :-) Ct goes down when Vr goes up ! The increased reverse voltage causes the size of the depletion layer to expand, this decreases the capacitance. Visualize it, now remember forever :-) Nov 5, 2015 at 13:53