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I was studying for my Design of Analog Circuits course and I have two questions about this ADC. If someone can explain me why in the figure below in the Pipeline Analog to Digital Converter, why Vin is compared with Vref/2 instead of Vref and why after doing the summation, the result is multiplied by a gain of 2? What does that has to be with functionality of the ADC.

Pipeline ADC

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  • \$\begingroup\$ If Vref is the full scale range, then above what voltage must the signal be for the MSB to be set? \$\endgroup\$ – Tom Carpenter Nov 9 '15 at 1:44
  • \$\begingroup\$ If Vin > Vref/2, then MSB = 1. If Vin < Vref/2, then MSB = 0. Why is that? Why comparing with Vref/2? \$\endgroup\$ – EMPV Nov 9 '15 at 1:58
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    \$\begingroup\$ If you have to ask that, you need to go back to the very beginning and understand what an in general ADC does, more specifically how voltages map to binary codes. \$\endgroup\$ – Tom Carpenter Nov 9 '15 at 2:31
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The comparison with vref/2 is because that is the place-value of the MSB of the ADC output.

the next bit has a value of 1/4 vref, so the difference value is doubled before comparison with vref/2

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