I have an assignment where where I have to design a FSM which outputs the following Hex number in binary, one digit at a time: 12498A3B. The FSM must use a clock signal and D flip-flops to do so.
I firstly made the state diagram, then I made the current/next state table, next I created 4 Karnaugh maps to determine the next state bit output for each DFF. I used the 4 Boolean expressions derived from these K-maps to create my FSM in the "Logisim" program.
My circuit cycles through each digit as it should in the correct order, however the initial output by my FSM isn't the initial digit of the Hex number, but rather one of the digits in the centre of the number. How is this possible? I am new to designing FSMs but I had the impression that when implementing the Boolean expressions obtained from the K-maps would produce the expected initial state?
I can provide screenshots of all my work if further clarity is needed.