When reading about the difference between SDRAM and SRAM (electronically), I understand that SDRAM requires the dynamically charging of the capacitors to maintain their states. I do not get how SRAM maintain its state. SRAM are essentially flip-flops and probably relies on the processor to remember what current flow goes into the flip-flops to get a state. So I do not get what is "Static" in flip-flop/SRAM (e.g. a spinning disk drive would use magnetism to maintain a state - that's more static). Or, am I misunderstanding something here?

  • \$\begingroup\$ Look at where the current is flowing in what state. \$\endgroup\$ – PlasmaHH Nov 10 '15 at 11:08
  • \$\begingroup\$ if that is so then SRAM is just as dynamic as SDRAM, where instead of remember which capacitor to charge or discharge, SRAW remembers what current is flowing in what state. So there is not nothing "keeping" statically in SRAM.. \$\endgroup\$ – KMC Nov 10 '15 at 11:11
  • \$\begingroup\$ There is no switching action or any voltages or currents changing in SRAM. There is in SDRAM a lot of it. \$\endgroup\$ – PlasmaHH Nov 10 '15 at 11:12
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    \$\begingroup\$ The answer is essentially "positive feedback". The SRAM cell's own output drives its input (in the absence of a "Write" operation) so the state is maintained as long as the circuit is powered. "DRAM" in contrast will forget, as leakage current drains a capacitor, unless you periodically (dynamically) refresh the storage. \$\endgroup\$ – user_1818839 Nov 10 '15 at 13:02

If we have a classical flip flop (like this image from wikipedia):

enter image description here

You can see that depending on the state this is in, there is constantly some current flowing (and "stealing" current through the R3/R4 path, thus shutting that one off). The result then is never changing again, as long as VCC is active, thus the state of the whole apparatus is static. If you switch off VCC, the data is gone, so "static" doesn't mean "runs without power" but "runs in a steady state".

On the other hand, for a typical DRAM cell (again wikipedia, sorry they did not have a single cell image):

enter image description here

One action fills one of the capacitors, but after a short time, due to leakage, the capacitor loses its charge. So you have some external circuitry that is constantly reading the bits (you can even see that they need a latching comparator there), and writing them again. Thus you have a lot of switching going on, the whole apparatus is dynamic. Not only needs it a constant power supply, but constant dynamic changes of its internal state.


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