# Gate Driver IC question?

Refer to this Question: MOSFET Gate Driver Simulation Problem

My Gate Driver datasheet: http://www.irf.com/product-info/datasheets/data/ir2104.pdf

May I ask why there are two capacitors instead of just one hooked up in parallel between Vb and Vs? I am also using a gate driver to drive the FETs of my synchronous buck converter, and I am having similar trouble turning on the high-side FET. I also have everything hooked up as in the IR2014 datasheet (which I've also attached) except I'm not using any resistors between HO (LO) and the high-side (low-side) FET gate. Maybe this could be my problem, but I can't figure out why that would be so.

• The two caps are there to supply the boostrap voltage... or something like that.. may you can search about boostrap capacitors. – Gabriel Rezende Germanovix Nov 10 '15 at 23:20
• I understand it is to provide the bootstrap voltage, I am just curious as to why two are used instead of one? – L_t130 Nov 10 '15 at 23:37
• Maybe one can handle, but if they have two different value: one in a range of uF and other nF..this is to supply low and high frequency variation.. – Gabriel Rezende Germanovix Nov 10 '15 at 23:44
• Is very common to see two capacitors in parallel in regulators inputs and outputs. Large capacitors are usually electrolytic and they are used to filter out low frequency ripple and respond to reasonably fast load changes, however they are not good at filtering higher frequency noise, that is why the small capacitors (usuarlly ceramic and non-polarized) are used. These have an excellent high frequency response and noise filtering capabilities – cventu Nov 10 '15 at 23:56
• @cventu : make your comment an answer, and I will upvote it. The answer is simple and concise as you have just pointed out. – Marla Nov 11 '15 at 1:54

Is very common to see two capacitors in parallel in regulators inputs and outputs. Large capacitors are usually electrolytic and they are used to filter out low frequency ripple and respond to reasonably fast load changes, however they are not good at filtering higher frequency noise, that is why the small capacitors (usuarlly ceramic and non-polarized) are used. These have an excellent high frequency response and noise filtering capabilities

cventu has provided a good answer as to why two capacitors might be needed between Vb and Vs of the IR2104. Sometimes, when $f_{\text{pwm}}$ is a very low frequency like 60Hz or so, a large amount of capacitance is required to support the current demands of the high side drive.

But in truth, we have no idea why the OP of the linked question used such a large amount of capacitance since there is no mention of the value of $f_{\text{pwm}}$. That's too bad too, because knowing $f_{\text{pwm}}$ is key to knowing how much bootstrap capacitance to use. Usually for higher values of $f_{\text{pwm}}$ (like ~100kHz) a bootstrap capacitance of only a few tenths of a $\mu F$ are needed.

To determine how much bootstrap capacitance to use, it is necessary to know $f_{\text{pwm}}$, $Q_g$ (FET gate charge), $I_{\text{bs}}$ (bias current IR2104 high side), and $\Delta V_{\text{bs}}$ (change of IR2104 high side bias voltage). Then use the voltage-current relation of a capacitor:

$i(t)$ = $C\frac{ \text{ dV}}{\text{dt}}$

to calculate $C_{\text{bs}}$. Let's pretend that $i(t)$ is a constant so:

$C$ = $\frac{I\Delta T}{\Delta V}$; where $I$ = $Q_g f_{\text{pwm}} + I_{\text{bs}}$ and $\Delta T$=$\frac{1}{f_{\text{pwm}}}$

$C_{\text{bs}}$ ~ $\frac{Q_g f_{\text{pwm}} + I_{\text{bs}}}{f_{\text{pwm}}\Delta V}$

Let's say that $Q_g$ = 30nC (about like an IRF530), $I_{\text{bs}}$ = 50$\mu A$ (about like IR2104), $f_{\text{pwm}}$ = 100kHz, and $\Delta V_{\text{bs}}$ = 0.1V. Then:

$C_{\text{bs}}$ ~ $\frac{(30nC)( 100{\text{kHz}}) +50\mu A}{(100{\text{kHz}})(0.1V)}$ ~ $0.33\mu F$

So, for $f_{\text{pwm}}$ in the tens of kHz, $C_{\text{bs}}$ only needs to be a single ceramic part.

The IR2104 is pretty easy to use since you only have to provide $V_{\text{cc}}$ > 10V, and drive one input (IN) with PWM signal. Generation of high side and low side output timing is taken care of for you. When IN is low, $V_{\text{LO}}$ will be high, turning on the low side FET and charging $C_{\text{bs}}$ while $V_{\text{HO}}$ is low and high side FET is off. When IN is high, $V_{\text{LO}}$ will be low, turning off the low side FET, while $V_{\text{HO}}$ is high and high side FET is turned on removing some charge from $C_{\text{bs}}$ resulting in $\Delta V_{\text{bs}}$.

• Thank you. May I ask if there is any harm in choosing a capacitor with a value significantly higher than Cbs?? And what exactly do you mean by Vbs( change in IR2104 high side bias voltage)? Do you mean the change in the voltage output of the high output pin? – L_t130 Nov 12 '15 at 3:56
• @L_t130, It's usually best to have Cbs less than the Vcc decoupling cap for the IR2104. If Cbs gets too big, charging it can be a source of ripple on the bias voltage. Just before IN goes high, Vbs will be at its maximum, having just been charged. While IN is high, all power for high side operation of IR2104 comes out of Cbs, so voltage across Cbs drops, that's $\Delta V_{\text{bs}}$. In the example, Cbs was chosen to keep the droop to ~0.1V. If Vbs gets low enough from droop, there will be under voltage lockout. – gsills Nov 13 '15 at 4:38