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Does anybody have experience biasing and pulsing a microwave GaN HEMT? I've just ordered a 10 Watt S-band transistor. I know all about bias sequencing. This application is pulsed. I've read about pulsing the drain with a high side switch as well as pulsing by pinching the gate (Microsemi, Triquint, etc. white papers and PhD defences).

Has anyone tried either approaches. In order of importance: (1) rise/fall time, (2) efficiency. I'm concerned about undocumented effects of more than just series resistance with drain pulsing.

I would like real world experiences.

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  • \$\begingroup\$ I am helping support a german made microwave generator .The driver FET is a depletion mode type and the neg bias is driven from a cap volt convertor chip off the same rail .Spookey it is possible to lock the thing up if the psu doesnt make about twice its cont rating .Dont do what they did . \$\endgroup\$ – Autistic Dec 17 '15 at 9:36
  • \$\begingroup\$ My graduation project was Harmonically pumped mixer design on MMIC(GaN HEMT process). There is a method called Hard switching. Both drain and gate is pulsed in a timing function. It makes switching much faster but it comes with harmonics. Some vendors gives the information about hard switching but it depends on so much thing in the environment. You need to take care alot of things in the time domain(output resistance, parasitics, Cgs(Vin), intermodulation currents(f) etc.). \$\endgroup\$ – Alper91 Jan 24 '16 at 20:45
  • \$\begingroup\$ Other than that, about undocumented effects, you can do so less about it. Thats way my teachs work with the same transistors for more than 5 years. Because they are scared to switch another one.(In academic business of course). But if it helps I know drain pulse can make nasty harmonics for certain biasing classes. In microwave nothing can be modelled with simple analog equivalent circuits. \$\endgroup\$ – Alper91 Jan 24 '16 at 20:49
  • \$\begingroup\$ I made PAs using LDMOS blf2043f ptfa080551e (class AB) and old soviet kt919 (class C). ldmos transistors appeared to be very esd sensitive on a gate side (destroyed a couple this way). On the other hand the drain was very rugged and withstood huge impedance mismatch. Can add more real world experience if you wish. \$\endgroup\$ – ivan Apr 19 '16 at 21:02
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Drain switching is somewhat complex, as one need to be assured the bias conditions are stable before applying and signal to the gate. I am assuming you are familiar with stability circles and the like and have performed the required analysis for your wanted operating conditions. Be aware that the steady state large signal S-parameter may differ significantly from your pulsed large signal S-parameters (not an easy measurement, btw) which may invalidate your initial stability analysis, but if that's all you have it's a reasonable starting point. At a push, even the small signal S-parameters are better than nothing. GaN devices suffer more than GaAs from internal heating effects, due to their smaller geometries and higher energy densities - there's less chip backside area to conduct the heat away. The canon of knowledge on GaN is significantly smaller than for GaAs, although that may have changed since I last looked.

Obviously, when drain switching, there is a certain amount of time required for the bias to stabilize - this is dependent on the device and duty ratio and power.

If your application allows, using class B or C operation is the simplest way to go which avoids the need for drain switching, but you will generate more harmonics, which is a problem unless you have a tuned load. Also remember that filters generally reflect out of band power, which might upset your device.

Always ensure that your device is protected from operating into an open circuit - one way is to use a isolator on the output - many power devices have been destroyed this way.

Do not expect to be able to simulate the behaviour of these devices fully - you will have to experiment - and you will lose a few devices along the way! Good luck!

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