# Correct SPI Configuration?

I'm still not entirely clear on TTL, so please, forgive my ignorance in this.

I have a sensor and a microcontroller. The sensor is a BMI055 Gyroscope and accelerometer. The microcontroller is the Atmel AT32UC3C0512CAU-ALUT. With these two, I want to connect them with a correct 4-wire SPI interface.

Here is my proposed layout:

pins 13-17 are as follows from the datasheet (above):

13: (Function B) SPI0 MOSI

14: (Function B) SPI0 MISO

15: (Function B) SPI0 SCK

16: (Function B) SPI0 NPCS{0} (NPCS is chip select pin)

17: (Function B) SPI0 NPCS{1}

Thing I have questions on: Am I correct in using pull-down resistors? I hear Pull-up is more common, but I'm not sure why. Another thing is how would you make this schematic prettier? it's pretty bad right now. and my final concern is the value of these resistors. I'm not sure how to calculate that.

• And TTT logic is? – Fizz Nov 12 '15 at 17:02
• Transistor to Transistor – user86234 Nov 12 '15 at 17:07
• You mean TTL? None of the chips you indicate are such. They're all CMOS as far as I can tell. – Fizz Nov 12 '15 at 17:07
• CS-A and CS-G should have pull-ups to disable SDO while the MCU is reset (actually BMI055 has them integrated). Pull-up or pull-down resistors on SDI, SDO and SCK are a good practice although not critical in this case. Diodes on SDOs are wrong, use series resistors (e.g. 220 $\Omega$) instead (to protect outputs from short circuit in case of accidentally setting both CS# low). – venny Nov 12 '15 at 18:01
• Which I saw you did. You have weak pull ups. They aren't strictly necessary except perhaps CS. Just keep that in mind when prototyping – crasic Nov 12 '15 at 21:58

## 1 Answer

SPI uses a push-pull configuration, so you don't really need the resistors.

The resistors are only there to have a defined level while the pins of the MCU are configured as an input. So in this case you can use pretty large resistors (like 100k) to reduce the additional current draw of the resistors when you are actively driving the lines.

The direction in which you pull the line depends on the idle state of the connected line. If it is idle high, you use a pull-up, if it is idle low, you use a pull-down.

So for the BMI055 it seems like pulling CSx high would be better and SCK high as well (both idle high).

You can probably remove the diodes as the SDO state is High-Z (high impedance) when not active, so you won't get a short.

You are not supplying a voltage to VDDIO.

Place 100nF caps in parallel to the ones you have on VDD and VDDIO.

Ways to improve your schematic (in my view, as with coding styles, they differ from person to person):

• make sure there is a junction point on every point a connection is made (there are missing a some on the pull-down resistors for example)
• place the reference symbols in the "right" direction, GND points downwards, 3V3 upwards
• Don't place parts of your question on your schematic only
• Where are all the arrows going?
• Laying out the components pins the way they are in the datasheet helps a peer greatly to do a review, currently it's hard to tell if they are right (also the names should be the same or more explanatory than those in the datasheet)
• I miss the actual pin numbers (cannot check if labels and numbers are correctly matched to each other)
• In response to the vddio, i thought that that was an output pin via an internal regulator? – user86234 Nov 12 '15 at 18:25
• I took your advice. is this better? i.imgur.com/tkrQ2dn.png – user86234 Nov 12 '15 at 19:45
• @tuskiomi " VDDIO is a separate power supply pin mainly used for the supply of the interface" So you have to supply a voltage to it, and you have to use decoupling capacitors like the one I mentioned in my answer. Your new schematic is better, but doesn't contain my advice on pulling the chip selects and clock high. If you pull the chip select low, it will be active, so currently you will enable both SPI interfaces of the BMI055 at the same time until your MCU starts - you certainly don't want to do that. – Arsenal Nov 12 '15 at 21:54
• I improved on it a bit more, and took your advice. here is the new schematic: i.imgur.com/aqhFB1E.png – user86234 Nov 13 '15 at 0:23
• @tuskiomi That is looking better, but still not optimal. For further improvements there is this and this question already, with some very nice answers on how to improve schematics. – Arsenal Nov 13 '15 at 18:50