Some questions have already been asked about crystals but there's a few competing designs and I have a few "obsessive" type questions on layout. Here's a almost completed layout with a PIC16F microcontroller connected to a 32.768kHz (12.5pF). Relevant linked questions are:
C22, C23 are 18pF, that's what I came up with after doing: 12.5 * 2 - 2 * stray.
The snap grid on Eagle is 0.5mm.
R23 is a resistor I'm undecided about because I see designs with 100k or so and designs without it. That's question 1!
I've added a ground fill under the crystal (pins 2 and 3 are unconnected on that particular part) and connected it to local ground only. Olin has mentioned doing that about 100 times so I believe that is the right thing to do. But other designs do a ground ring around the crystal on top layer. Is that only necessary on a single layer board?
Pin 6 on the PIC is an digital assert line. I'm hesistant - how close can I bring that trace to the crystal before upsetting the high impedence crystal oscillation? The distance between pins 3 and 4 is 0.7mm approx so it stands to reason (?) that I can be that close?
the crystal traces are not equal. Should I make an attempt to make them more equal?