# amplifier design with npn transistor

I tried to design a common emitter amplifier for the first time, for an audio amplifier; however the gain is not as I expected. I don't understand why voltage changes when I measure the voltage from the right or left of the capacitor c2. My question is what kind of effect C2 has on the circuit? So I can change it in a way that my gain is not lost. Below graph red is the output voltage I get when I measured voltage at the leftside of C2 (Vc) and green is Vr3. (R3 is 1K which is not seen on schematics) Thank you.

• Do you know the purpose of the output capacitor? What kind of difference do you see between both output signals?
– LvW
Commented Nov 17, 2015 at 12:43
• Remove the output capacitor, think about it, what will happen ? Now short that capacitor, what happens now ? Hint: compare the DC voltage at Q1's collector. Commented Nov 17, 2015 at 12:46
• I started learning about transistors by learning and building these kind of circuits .Though capacitors do affect the circuit their effect is more prominent in filtering signals when connected as in the circuit above rather than affecting the gain too much . A capacitor across R2 would be a different story
– user50456
Commented Nov 17, 2015 at 12:57
• Sure but here C2 is just a coupling capacitor, it lets the signal pass but blocks the DC voltage at the collector. Without C2 most of the current through R1 would be lost through R3 instead of going through the transistor. In principle C2 and R3 are a High-pass filter with blocking the DC as its main function. Commented Nov 17, 2015 at 13:06
• My bad . i thought it was 8 ohm .instead of 4k
– user50456
Commented Nov 17, 2015 at 13:29

You are not losing gain, and your scope traces even show that since they are both about the same height.

The difference is the DC level. At the left side of C2, the DC level can only ever be between power and ground. The circuit is therefore biased so that the signal is centered far enough from either extreme to allow swing in either direction. That's why the signal at the left side of C2 is not centered around 0.

However, a net DC bias is undesirable in a delivered audio signal. Even HiFi audio only goes down to 20 Hz, so doesn't include DC. Any DC on the audio signal would cause dissipation in a resistive load, but without doing anything useful. In fact, DC bias will make ordinary speakers work less well and heat them unnecessarily. Since DC bias is not needed and can cause trouble, audio amplifiers usually produce a output signal without DC bias, which is another way of saying it is centered around 0 V. This is the purpose of C2 in your circuit. It blocks DC but passes the AC audio signal.

So you're not loosing gain across C2. It's merely doing its job of blocking the DC level.

The capacitor C2, is responsible for coupling the output signal to the load (R3).
Depending on the operating frequency of the capacitor C2 has a certain resistance (capacitive reactance $X_C$) to the signal path.

$X_C = \dfrac{1}{2\pi\cdot f\cdot C}\quad [\Omega]$

where $f$ is the operation frecuency, and C the capacitor value in farads.

I recommend that you review equivalent circuit topics.

• The frequency of input signal is too large that I think it shouldn't create that much resistance to reduce the gain. Or did I get it wrong? Commented Nov 17, 2015 at 13:35
• @corvettee look at the formula. If f is large, then Xc is small. Commented Nov 17, 2015 at 13:43
• @corvette, what is the present value of R3? If the input resistance r,2 of the second stage is smaller than R3, the gain will decrease (r,2 will load the first stage).
– LvW
Commented Nov 17, 2015 at 15:02