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In the concept of memory interfacing (cpu<=>memory), it is desirable to have two banks for odd and even addresses. The reason goes back to the history when manufacturers increased data bus width from 8-bit. So, they decided to put odd addresses on one bank and put even addresses in the even bank.

See this for more information.

            ODD                       EVEN
         D15     D8                D7        D0
        +-----------+             +------------+
  00001 |           |       00000 |            |
        +-----------+             +------------+
  00003 |           |       00002 |            |
        +-----------+             +------------+
  00005 |           |       00004 |            |
        +-----------+             +------------+
        |  ....     |             |     ....   |
        +-----------+             +------------+

However, if you buy a ROM, it contains all addresses (00000-00001-...)

With banking we are using half of the capacity for each group (odd/even). Isn't that right? That means, using two physical ROM chips for addressing/accessing the memory is the same as one physical chip which has both even and odd addresses.

So what is the benefits from using multiple banks?

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  • \$\begingroup\$ What the ...? Way too much babbling and attempting to lecture, so that any answer to whatever this question actually is would require too much unraveling of implied assumptions. Closing. \$\endgroup\$ – Olin Lathrop Nov 20 '15 at 11:47
  • \$\begingroup\$ Off the top of my head (as this isn't a good answer): back in the day, rom/ram chips were limited in size - cheaper to buy two small than one big. Access time was slow - if you have two at the same address (from bit#1 upwards) you could possibly halve the average setup time. \$\endgroup\$ – carveone Nov 20 '15 at 11:53
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The benefit is that you can combine the increased bandwidth of a wider data bus with the increased economy of narrower memory. There is a gain whenever connecting a k*n-bit memory device with a k*n-bit memory interface would cost more than connecting k n-bit memory devices to the same interface.

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  • \$\begingroup\$ OK. I was thinking that two physical chips consumes twice as one chip because two chips are active while half of the capacity in each bank is used. The problem will be worse for 64-bit address space. \$\endgroup\$ – mahmood Nov 20 '15 at 11:56

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