I'm using Cadence Virtuoso 6.1.6 and am trying to design a ring oscillator using CMOS inverters. I have looked at other questions that have been asked on this forum, but I wasn't able to find any that were designed using Cadence.
A little background - I have been tasked with making a "VCO" using "sgfet" CMOS transistors. These "sgfet" transistors are very similar to regular CMOS transistors. The only difference is that these transistors are cylindrical as opposed to having a width and length. But their behaviour is exactly the same as regular CMOS transistors.
I strung three inverters together to create the ring oscillator as follows -
The capacitors I used between the inverters are both 10nF (I'm not sure if these are necessary or not).
Once I ran the simulation, I get the following output -
Why am I not able to get an undamped output? I have tried almost everything I can. Please help!