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I am attempting to use a SPI NOR flash memory IC that is said to support CFI (Common Flash Interface) and the JEDEC flash command set. This sounds great however I have been unable to find any documentation on what the JEDEC command set is specifically or how to interface with this device.

Does anybody know of a reference for this information?

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3 Answers 3

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The CFI Specification can be downloaded from jedec.org.

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  • \$\begingroup\$ I did see that however this seems to just give tables of data stored. I want to know what byte do I need to do to start a Page Program for example \$\endgroup\$ Commented Nov 25, 2015 at 3:22
  • \$\begingroup\$ These are vendor defined. The Query structure gives you the algorithm ID, the actual protocol can usually be found on the vendor site. \$\endgroup\$ Commented Nov 25, 2015 at 10:58
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The JEDEC "Common Flash Interface" (CFI) specification (mentioned by the other answer) applies to parallel-connected flash chips; i.e. ones connected to a host processor via an address & data bus. For SPI flash devices, the corresponding JEDEC spec is "Serial Flash Discoverable Paramters" (SFDP).

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Following on from the other answers, it appears that it can be vendor specific about if a SPI NOR flash memory supports the JEDEC "Common Flash Interface" (CFI) or "Serial Flash Discoverable Parameters" (SFDP) specification.

E.g. was looking at the datasheets for two configuration memories used for Xilinx 7-series FPGA configuration memory, for the purpose of a creating a host driver to re-program the configuration memory in-situ via the AXI Quad SPI IP:

  1. The Infineon (ex Spansion) S25FL128SAGBHI210 datasheet defines the JEDEC CFI information read using the RDID (0x9F) command.
  2. The Micron N25Q256A11ESF40G datasheet defines the Serial Flash Discovery Parameter Data Structure (Compliant with JEDEC standard JC-42.4 1775.03) read using the READ SERIAL FLASH DISCOVERY PARAMETER (0x5A) command.
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