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Consider the following integrator circuit:

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Why doesn't the current through the capacitor and voltage across it behave exponentially? There is a straight section in the beginning, up to around 2ms - why is that?

Current through capacitor:

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Voltage across capacitor:

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Edit:

It seems like somehow the output voltage is limiting the capacitor voltage. I can't seem to understand why though...

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  • \$\begingroup\$ The straight section is where the integrator is working. When the opamp starts clipping, the virtual earth at -In can no longer be maintained, then you see the current decay exponentially. (You will also note that -In is no longer 0V as it should be) \$\endgroup\$
    – user16324
    Commented Nov 30, 2015 at 0:33
  • \$\begingroup\$ Just for your understandng: The first part looks like a straight line, but it is not. It has an exponential characteristic with a very large time constant. This is because the opamp has a finite (however, very large) dc gain. Only an opamp with infinite gain (not existing) would, theoretically, produce a straigh line. \$\endgroup\$
    – LvW
    Commented Nov 30, 2015 at 7:55

2 Answers 2

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Opamp tries to keep both of its inputs at the same voltage. Since the positive input is fixed at ground, the inverting input must be at 0V too. The inputs of an opamp are very high impedance, so we can assume that no current can flow in or out of them. The only way the current can flow is into the output of the opamp.

Since V1 is connected to the inverting input trough a 1K resistor, the current trough that 1K resistor has to be 5mA to result in the inverting input voltage at 0V, as such, the opamp output becomes a 5mA current sink, charging the capacitor with the constant current.

When you connect a capacitor to a constant current source, the voltage is linear with time. So this explains the linear portion of the graph.

After that, the opamp can no longer provide output negative enough (the supply rails are probably +-15V) to sustain the constant current, the current decreases and the voltage graph flattens out. Ideally, the capacitor would charge linearly forever.

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  • \$\begingroup\$ Here is another explanation (as an alternative to the current source model): The circuit behaves like a simple RC-section with a capacitor C which is increased by a factor of a Ao (open-loop opamp DC gain) due to the known MILLER effect. Therefore the name: MILLER integrator. Thus, we have a very large time constant allowing only a very small (rising) voltage at the node common to R and C (inverting opamp terminal); however, this small voltage appears at the opamp output after multiplication by Ao. \$\endgroup\$
    – LvW
    Commented Nov 30, 2015 at 8:02
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Well, the answer is obvious your Op-Amp mode has internal limitation which limits the output voltage to +/-12V. But of course you can change it. Simple double click on the OP-Amp and change "Positive voltage swing (VSW+)" and "Negative voltage swing (VSW-)" to whatever value you want.

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