# Help using transistor in active mode as a current limiter

Brief context: I have a small solar panel, nominal properties are 0.6W, 6V, 100mA. In given conditions I want to measure the maximum power it can produce - I do not want to do anything with this power, simply measure it (I am actually using it as an estimate for the amount my main panels could be producing). The idea I have is to vary the load on this small panel and calculate the power at each load setting - again the actual load that produces the maximum power isn't important, simply to be able to change it.

How I thought I could do this:

So I thought that varying Ib would allow me to effectively vary the load on the solar panel. I can then measure the current flowing by the voltage difference across R1, and the voltage 2xV1 would then allow me to calculate the power. (I realise the current through my potential dividers could be over 1mA each, and I will be increasing those resistor values when I can provide a buffer for the ADC inputs).

To control Ib I have been using the circuit:

Currently I'm using the 50k version of the digital pot. The spec says the limit is 1mA. So (3.3 - 0.6) = 2.7V across the digital pot + limiting resistor, and the 2.7k resistor therefore limits the maximum current to 1mA. If the transistor (currently a 2N2222 - but I'm open to suggestions) has an hfe of ~100 then this would allow for upto 100mA current for the solar panel (this should be fine to get a profile in weak sun conditions, though I will need to increase this limit to get a full load-power profile in strong sun).

However, it's not really behaving as I had hoped / expected. I suspect due to my failure to quite understand transistors in their active mode.

I would have thought the correct circuit would have pin B of the digital pot tied to pin W. However when I try this, I simply get a random variation of 0 to 0.03V at V1, and I also get a mix of +ve and -ve currents of the order of ~0.01mA - ie in this configuration I simply get noise surrounding V1 = V2 = 0V - as if the transistor is saturated regardless of the setting of the digital pot and therefore regardless of the current provided to the base of the transistor.

If I tie pin B of the digital pot to ground, so it's now acting more like a potential divider, then I measure (eg, in the weak indirect winter sun at the weekend) 2.5V for V1, 0 mA, up until the digital pot gets to ~1/5 of it's range (ie 3.3 / 5 = 0.66V) at which point V1 drops to 0. It seems like despite the limited current supplied to Ib at this setting ((3.3 - 0.66) / 42,700 = 0.06mA) the transistor is still simply turning completely on and providing no current limiting function to the solar cell circuit.

Any pointers about how to correct my circuit / understanding would be greatly appreciated! Alternatively any suggestions for a better (preferably simple) circuit to achieve what I'd like is equally appreciated.

Unfortunately I'm a little limited - I have internet at work only, and daylight to drive the panel at weekends only (an LED headtorch does a poor job!)... so that doesn't help with the trial and error approach I've tried so far!

----------- Later edit (14-12-2015) ---------

Well, this weekend I tried out user44635's suggestion. Unfortunately the sun did not want to come out to play, so with very gray skies I got this:

which is the sort of thing I'm looking for. A little surprised at quite how little power was produced but I'm hopeful that this may work - just need to await a sunnier weekend to get some different profiles and see if I get meaningful max power values.

I am also going to get the parts for the circuit suggested by Martin. Hopefully then I'll have two functioning circuits and I can see which'll work best for me. Thanks all.

• Trying to control the current in an open loop system like that is not really a great idea, at least you need to apply some form of negative feedback (eg a resistor in the transistors emitter lead) to the current control, but it would probably be simpler to just switch a set of fixed loads across the solar cell. – Icy Dec 8 '15 at 9:22
• Fritzing is such an ugly piece of work. – Andy aka Dec 8 '15 at 9:39

To get the I/V-Curve of the solar panel (and therefore the Maximum Power Point), I would suggest you use a circuit with feedback to change the current sourced from the solar panel. This is possible with a variable current source like this:

simulate this circuit – Schematic created using CircuitLab

Vref determines the current sinked from the solar panel. The current is calculated as follows:

$I=\frac{V_{ref}}{R_2}$

Therefore, from the knowledge of the Vref and the measurement of the solar panel voltage, you can easily determine the maximum power of your panels

For reference: The circuit is from "A collection of Amp Application by James Wong (Analog Devices): http://www.analog.com/media/en/technical-documentation/application-notes/28080533AN106.pdf

• Thank you for the circuit and the link. At the moment I don't have the appropriate components so I shall try user44635's suggestion first. If that doesn't prove to work then it'll be good to have this option to try! – Joseph Dec 8 '15 at 17:46
• I like this idea a lot, having had a bit of a chance to think and understand it. One question I do have though, is at the point when I've wound the input voltage up to the point where the panel can deliver no more current, and I then increment the input voltage a little further, the op-amp then no longer gets a corresponding increase in negative feedback? Presumably the output voltage of the op amp then rises straight to the supply voltage (or it's maximum output voltage) - is this a problem for the mosfet? Do I need to add anything to protect against or catch this situation? – Joseph Dec 16 '15 at 17:49
• Sorry for my late reply. I hope you came the conclusion yourself that whether or not the MOSFET gets damaged depends on the specific device used. As you said correct, the OP-Amp will drive its output to the maximum value possible. If its a rail to rail OP than this will be Vcc. If we look in the data-sheet of the IRF520 in the section "ABSOLUTE MAXIMUM RATINGS" we see that the maximum allowed Gate-Source-Voltage is +-20V. This means, as long the maximum output of the OP-Amp is below this value, no protection is needed. – Martin Dec 20 '15 at 8:33
• Excellent, thanks for the confirmation. I have had a go with this circuit but didn't have much luck. Since the other suggestion is giving reasonable results I am going to continue with that one. I have however ordered a second mini solar panel so that I can try this out again later and hopefully produce an improved circuit when time allows. Thanks for the help. – Joseph Dec 24 '15 at 8:35

A much more stable arrangement would be to swap the places of R1 and Q1, putting Q1 collector to +ve rail and R1 in its emitter, and control the voltage into the base of Q1. This turns it into a defined current sink, by forcing the voltage across R1 to be roughly VB-0.7v. Still measure the R1 voltage for good accuracy accuracy, because the 0.7v VBE wanders around a little with temperature and current, but it will be orders of magnitude more stable than trying to control the base current.

Use a series resistor into the base of Q1 so that when it's saturated, you don't try to pump excess current into R1 through the BE junction from the base voltage DAC.

This now makes all your voltage measurements with respect to ground.

Where R4 and GND connect to the -ve rail, please don't use 4 way junctions, only ever use 3 way, and stagger the connection points if needed. It's a style thing, but an important style thing, it will save you trouble with the visibility of dots in the long term.

• Thanks. That seems like a good option to explore. I had initially gone with the configuration I have as it excludes the base current from the current being measured through R1. However, given that the base current should be orders of magnitude smaller then if moving the components around in this way gives a sensible result then I can accept the slight inaccuracy. I'll give this a try at the weekend. – Joseph Dec 8 '15 at 17:43