I know there are other questions on this site about decoupling, but I do not feel they accurately cover the full decision process.
I am interested in knowing the decisions that go into choosing decoupling caps. I do not mean a microprocessor with a well laid out datasheet containing proper diagrams of the capacitors, and I do not want to concern this questions with layout as decoupling in layout is separate and a huge subject.
Let us take an i7 as an example. What are the steps that one would take in choosing decoupling caps? Certain things in the datasheet to model? ESR models? Signal speeds? I am just curious what rabbit holes I should go down if I want to be diligent and not rely on the manufacturers recommendations (which I am aware are important).