# Should the output of logic gate have pull-up or pull-down resistor

I am a bit confused whether my chosen AND gate should have pull-up or pull-down resistor on the outputs, as I don't see any sentence containing words like pull-up/down or sink or source ... but as far as I understand then TTL IC's usually need pull-up/down resistor on the output. When I am looking at the schematics then I would say it is capable of making both high and low, as there are transistors connecting the output to both Vcc and Vdd. Here's the datasheet: triple input AND.

I am also using NOR gate which states that it is totem pole output: Diodes Incorporated and part number: 74AHCT1G02W5-7 (sorry, not enough reputation to post more than 1 link :D). Am I right that it is capable of making both low and high output, but the high means it is only 3.5V as there are voltage drops across transistor junctions so I would have to use pull-up resistor on the output so it would be 5V.

Schematic snippet I have at the moment:

Some additional explanation is also much appreciated so I would have the know-how for the future how to read out the necessary info from the datasheet.

• Did you check to see if 5V would exceed the specs for the pin? Commented Dec 12, 2015 at 14:07
• It says that Vo is -0.5 to Vcc + 0.5 so it should be ok, right? (Vcc is from -0.5 to 6.5) Commented Dec 12, 2015 at 14:18
• What is Vcc in the circuit? Commented Dec 12, 2015 at 14:21
• Keeping inside the absolute maximum ratings does not destroy your chips immediately, but does not guarantee that your circuit works.
– CL.
Commented Dec 12, 2015 at 14:21
• Vcc is 5V in the circuit. Commented Dec 12, 2015 at 14:30

An open-collector or open-drain output would always need a pull-up resistor to get a defined voltage level. But you are not using such an output.

TTL outputs have defined voltage levels for both low and high signals, but the high level can be as low as 2.4 V (depending on how much current the output must supply). This is no problem for TTL inputs (which interpret any voltage above 2 V as high), but can be a problem for other logic families.

CMOS outputs go up to almost the supply voltage, and go down to almost ground level (because they do no use bipolar transistors but MOSFETs). Therefore, CMOS inputs are quite strict (typically, low-level signals must be below 30 % of VCC, and high-level signals, above 70 %).

If you want to connect a TTL output to a CMOS input, you need a pull-up resistor to raise the high level signal. (Connecting a CMOS output to a TTL input works just fine.)

(In the datasheets, the guaranteed output levels are specified as VOL and VOH, and the required input levels as VIL and VIH. An output and an input match if $V_{OL} \leq V_{IL}$ and $V_{OH} \geq V_{IH}$.)

LS is a TTL family; HCT is a CMOS family that has TTL-compatible inputs. So in your case, you do not need a pull-up resistor to get a correct voltage level.

There might be other reasons to use pull-up/-down resistors, for example, to get a defined signal when the chips are still in reset and do not drive their outputs either way.

• Excellent answer, but you might mention that you can connect TTL/LSTTL directly to CMOS if the CMOS is designed for it, such as the 74HCT series. Commented Dec 12, 2015 at 15:48

A push pull totem can drive the output to withing 0.6-0.7 volts of Vcc. With a Darlington pair will drop 1.2-1.5v. Theoretically this means that the output does not require a pull up. Practically tho generally logic is tied to other logic and this would be more than enough to drive the input of that logic. Ultimately it's not a bad idea to tie weak pullups to the inputs to make sure that when the device is powered that it starts in a predictable state.

• The SN74LS11 has a TTL output.
– CL.
Commented Dec 12, 2015 at 14:33
• @CL. the schematic of the SN74LS11 shown in the data sheet looks like a push pull totem to me. Commented Dec 12, 2015 at 14:39
• Yes, and two silicon junctions plus a resistor drop more than 0.7 V. As shown by its VOH.
– CL.
Commented Dec 12, 2015 at 14:44