I am trying to make a buffer for short, 5V pulses. The pulses are negative (form 5 to 0 V) and last for 500 ps to 10 ns (Half maximum, full width). The load is capacitive, around 50pF, and as close as possible to the buffer. The input will probably be a differential pair. The pulse repetition rate is expected to be around 50MHz.
I considered several options:
- Several fast logic gate, like SN74LVC2G04 in parallels. They could have adequate rise-time but the maximum frequency is low, around 150MHz.
- Fast, high slew rate Op-amp like an AD8009. The bandwidth is better and this could work with pulses around 5ns, but probably not with shorter ones.
- An RF amplifier, with a gain block or an RF FET. I don't know that much on those circuits beside basic class A amplifier and this will continuously consume power.
Thanks for any suggestions!
The pulses will be generated by some CML logic. The device driving the buffer will be similar to an ADCMP572. It's differential with a swing of 800 mV, so I need voltage gain, and enough current to get a good rise time.