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The ALU control unit dictates the operation to be done by the ALU. It's truth table though describes only 7 operations, which are enlisted in the truth table below.

How the processor handles the rest of the instructions like XOR, NOR, Shifts etc.?

Should I extend the ALU Control Unit and include this instructions? Send the opcode through registers to the ALU stage and decode there also? Or something else?

None of this is explained in either MIPS diagrams or ALU Control Unit tables I looked at.

MIPS control signals to ALU Control Unit

ALU Control Unit Truth Table

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So in some (maybe most) processors, ALUs dont have all the required operations as built in commands. I will explain it using the 6502, because I know bunches about its ALU.

enter image description here

Take a look at the 6502 ALU. It only has 5 control lines for performing operations, but can perform operations such as Rotate Left and Subtraction.

It can perform these operations by combining the available operations to create new ones.

For instance, Rotate left can be performed by adding a number to itself.

If you are writing this ALU in some HDL language and are not worried about logic space, I would implement the operations directly in the ALU and not worry about combining operations.

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  • \$\begingroup\$ Fascinating - where did that image come from? That's a much more detailed diagram than I've ever seen before for that part, outside of the Visual 6502 teardown. \$\endgroup\$
    – user39382
    Dec 16, 2015 at 19:57
  • \$\begingroup\$ @duskwuff Dr. Donald Hanson from the University of Mississippi drew this block diagram from the original 6502 schematic from MOS. Good read about it: plus.google.com/108984290462000253857/posts/aBPyXcVuLjR \$\endgroup\$
    – Jake Robinson
    Dec 16, 2015 at 20:08
  • \$\begingroup\$ @JakeRobinson Firstly thank you for the answer it introduced me to a whole new set of ideas and it also gave me a travel through time for that processor :) I write this ALU in an HDL language (VHDL) for educational purposes so space and optimizations are "irrelevant", for now. So, do you suggest passing the opcode to the ALU stage and make further decodes there or extend my ALU control unit? (Even though I guess both are architectural preferences) \$\endgroup\$
    – Spyros Chiotakis
    Dec 17, 2015 at 13:06
  • \$\begingroup\$ @SpyrosChiotakis I would say its up to you on how you want to implement it. The problem I have had in the past when changing the ALU is matching the cycle count of for operations. \$\endgroup\$
    – Jake Robinson
    Dec 18, 2015 at 13:57

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