# IBIS Model Characteristic Impedance

I have tried to understand how to match my 50 ohm pcb trace, which is carrying a high-speed data signal, with a digital chip's input pin.

The problem is that I don't understand why the calculations explained in this note from Texas Instruments are correct or even usefully.

http://www.ti.com/lit/an/slyt413/slyt413.pdf

On page 9 the characteristic impedance of the pin is calculated, and it seems that this should be used to match my series termination with the transmission line using the standard Zseries = Zo - Zout. They state that this formula defines both input and output impedance of the pin.

I assume that the transmission is longer than the raise/fall time of the output driver for my questions, and that there is no termination at the receiver, so a wave of double voltage is reflected, which I think is normal for series termination.

Now for the questions:

1. If the drivers MOSFET is ON, this would cancel the effect of C_COMP in the IBIS model, so does the reflected wave returning form the receiver really see the calculated impedance (+ the series termination) ?

2. If the pin is configured for input, I don't see that the characteristic impedance has any use. Say that we have calculated the pins characteristic impedance to be 50 ohm, it would be perfectly matched the line, but when configured for input, the wave has no where to go but back towards the driver, since the L-C circuit is reactive ?

But what am I missing...

A confusing article. If you don't already know what you're looking for, then it doesn't really help. What you're missing is that the IC pin is more or less insignificant compared to the PCB trace, for most systems.

If you follow the strategy in figure 7, then you will get good results, as long as your receiver can cope with half the swing that the transmitter puts out.

Figure 7 shows source and sink termination, the 100$\Omega$ resistors matching the line, and assuming no contribution or degradation from the IC pins at all. This is pretty much valid for most rise times and most 'low speed' systems, say below 500MHz, even for a few pF of silicon and pin capacitance, as long as the PCB transmission line is taken care of.

The alternative matching scheme for a) where you want more receiver swing and b) you have point to point connection is to use series source-only line termination. This means that you leave out the shunt R at the receiver. The transmitter launches a half-height signal into the line, it is reflected to full height at the receiver (a process it sounds like you know about), and then the reflection is absorbed in the source resistor. This half to full height reflection is why it can only be used point to point, not with multi-drop connections.

Obviously, for matching 50$\Omega$ lines, you'd use 50$\Omega$ resistors, though you may want to reduce the value of the source resistor to take account of the output resistance of the driver. Some drivers might have such a high source resistance that no additional source resistor needs to be used.

Make sure than your drivers have the capacity to drive 50$\Omega$ lines, that is a 100$\Omega$ load. TI used 100$\Omega$ lines as an example as that's kinder to drivers, and they take less width on a PCB.

Where TI's calculation of pin inductance and capacitance does become useful is when the chip has an internal termination, or frequencies have gone so high that it does become significant. I figure that if you're designing GHz serial links, you will not be scratching around on stack exchange looking for help, or you will be following the reference design board faithfully.

• Thank you for your answer. What I don't understand is why they calculate the characteristic impedance of the pin ? As far as I understood characteristic impedance is defined for transmission lines, but this would be a very short line, so the Zin on the pin would only "see" the die load. If instead of calculating the characteristic impedance, we could just calculate the impedance of the Cpin-Lpin-Ccomp circuit and use this impedance to calculate the correct parallel termination resistor. – JakobJ Dec 21 '15 at 14:16
• They calculate the pin impedance because they can. The line is very short, which is why it's usually irrelevant, relevant only when it becomes long which is at GHz frequencies. The correct parallel termination resistor is either a) the impedance of the PCB trace, for when you choose to doubly terminate the line as in figure 7, or b) nothing, for source matched lines. For most SMD packages, the Cpin+Ccomp will dominate, and you'll see a lumped C at the pin. An IC intended to be used at very high speed will have low C, or a well-defined internal R and a transmission line from the pin. – Neil_UK Dec 21 '15 at 14:54
• Okay thank you. What really confused me was some application note where they calculated the source impedance as the caracteristic impedance and used that to match the driver with the transmission line. I don't understand how that would be matched. Most other examples I have seen use the I/V data for matching the driver And the L C values for matching the receiver at GHz. – JakobJ Dec 21 '15 at 18:08
• That sounds sensible. In a source terminated transmission line, the drive impedance should match that of the line. If the driver output resistance is suitable, it can be used as the entire source resistance, without needing to add further series resistance. It doesn't matter whether you match the driver to the line, or the liner to the driver. – Neil_UK Dec 21 '15 at 18:33