I'm working on a layout in which two chips connect to each other through a 1x PCIe bus. The two chips are on one board.
One of the chips is the Xilinx Spartan6 LX75T so I've been working with the Spartan 6 PCIe User guide http://www.xilinx.com/support/documentation/user_guides/ug672_S6_IntEndptBlock_PCIe.pdf and on page 200 The guide specifies for Chip-to-Chip designs AC coupling capacitors CAN be placed anywhere on the interconnect. This implies that AC coupling is not necessary on chip-to-chip designs.
From my research I believe that the AC coupling is required to isolate the high impedance receiver inputs from any DC offsets that may be introduced by plug in cards. Which makes sense, if a PCI express card were to be plugged in and the TX lines had a DC offset that was different from the host board then it could send a common mode voltage that is out of spec for the receivers, but if I'm sure that this situation will not happen because my signals are between two chips then it seems as though AC caps are not required.
This seems a somewhat trivial problem because it's just two extra caps on the board but if I can avoid them then I also cut down on the vias required to route these traces thus reducing the attenuation on the signals.
Am I missing something? Or is it alright to remove the AC coupling caps for the TX lines?