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I'm sorry if this is off-topic. It may be better suited for a computer hardware forum, but I couldn't find anything appropriate.

I've been reading about the cold boot method, which can be used in forensic investigations, by enemy governments, or by criminal attackers to gain the key to an encrypted hard drive from DRAM when the computer is powered off. This method fascinates me, because I never realized DRAMs retained their state when powered off, but apparently the capacitors can retain some of their charge for minutes or even hours when the computer powers off.

Something I was wondering about. The paper says that the rate of decay is significantly slowed at lower temperatures. Why is this so? I'm guessing it's because the electrons are less excited at lower temperatures, so they are less likely to jump from molecule to molecule, so the capacitors are able to retain their charges for longer. Am I correct in thinking this?

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It's basically because the leakage current of a transistor in a DRAM cell is temperature dependent. Here's a typical DRAM cell schematic (taken from that book):

enter image description here

And here's a generic graph of how the leakage current varies with temperature for IC-level FETs

enter image description here

The latter graph is from another book. This is in fact an exponential dependence on temperature (note the semilog plot), well-approximated simply by using the Shockley diode model. The book says that "a common rule of thumb is that leakage current doubles for every 10C increase in temperature".

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    \$\begingroup\$ If you ultimately expect a derivation of the Shockeley equation from quantum physics principles, look in a solid state devices book like Hu's. It basically comes from the Fermi[-Dirac] function. That's more than I'm willing to recollect on xmas eve... \$\endgroup\$ – Fizz Dec 24 '15 at 16:42

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