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enter image description here

Above screen-shot is from a SPICE simulation of an NPN BJT where it shows the output characteristics Vce versus Ic. Ib is kept constant at 5uA where Vce increased from 0V to 5V.

I'm having difficulty in interpreting this plot at the saturation region. Okay so I'm gonna explain where is my confusion together with what I understand:

The output characteristics of an NPN transistor is obtained by keeping the base current Ib constant at a certain value when increasing Vce and obtaining a plot Vce versus Ic.

So as also seen in my simulation above, when Vce is below 0.2V the collector current Ic is decreasing dramatically. But according to the theory when the Vce is less than around 0.2V the transistor saturates. It acts as a closed switch. So Ic must take its highest value.

I'm confused at this point. Lets say you point the 0.1V Vce at the x-axis of the plot and go vertical until you intersect the curve, and you find 0.6mA. So simulation verifies under 0.2V the Ic decreases. But again at the same time "Vce under 0.2V" means there is saturation which means Ic must be maximum.

Why they shade that region in general? Does that mean that part of the curve shouldn't be taken into account? But then this is what simulation plots and probably I would get the same plot if I measure it.

What am I interpreting wrong here?

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  • \$\begingroup\$ I think for your purpose, it is best NOT to perform a TRAN analysis but instead a DC analysis with a simple DC current at the base node. Then, a sweep of Vce between 0 and 3V givews you the desired curve Ic=f(Vce). \$\endgroup\$ – LvW Dec 26 '15 at 10:38
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But again at the same time "Vce under 0.2V" means there is saturation which means Ic must be maximum

The "theory" is just a "rule of thumb" when turning a BJT on to act like a switch. The current that flows is still dependent on base current and collector voltage: -

enter image description here

Once the collector voltage has lowered beyond a point the BJT leaves the "active" region and enters saturation where it is "like" a base-current-controlled variable resistor. See the different rising slopes extending from the origin - if you approximated these to straight lines each has a V/I ratio just like in a MOSFET: -

enter image description here

Of course it can be really confusing the way that MOSFET's saturation region IS NOT the BJT's saturation region but the reason is clear if you consider that for a BJT it is saturation of the base whereas in a MOSFET (or JFET) it is saturation of the DS channel - two totally alien effects but called the same thing.


EDITED SECTION

I've added this because some internet pictures of a BJT's operating characteristic are incorrect. See below at an incorrect diagram of the BJT in saturation: -

enter image description here

There is NOT one line representing all base currents - each base current graph is individual and not "merged" as per the incorrect picture above.

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  • \$\begingroup\$ Any aka-I think, it is a bit too "optimistic" for saying that the BJT in the saturation region behaves "like a base-current-controlled variable resistor". Such an "ohmic" region does exist for FETs only. \$\endgroup\$ – LvW Dec 26 '15 at 11:30
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    \$\begingroup\$ @LvW - the MOSFET is "more linear" in its linear region than the BJT I agree - I'm just trying to get jjuserjr to see that in the saturation region, collector current is dependant on collector voltage AND base current - I'm aware that as collector voltage gets low (but still positive) this "analogy" breaks down (unlike a MOSFET). \$\endgroup\$ – Andy aka Dec 26 '15 at 11:35
  • \$\begingroup\$ Andy aka, more that that: The Ic=f(Vce) curve does NOT cross the origin and the behavior in the 3rd quadrant is COMPLETELY different from that in the 1st quadrant. Therefore, no application as a controlled resistor is possible. \$\endgroup\$ – LvW Dec 26 '15 at 14:06
  • \$\begingroup\$ Bjt 4 quadrant multiplier springs to mind. \$\endgroup\$ – Andy aka Dec 26 '15 at 14:51
  • \$\begingroup\$ Yes - but that is another story (didn`t we speak about a single transistor and its characteristics?) \$\endgroup\$ – LvW Dec 26 '15 at 16:16
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The current falls off in deep saturation since the device can't get any carriers from the collector to the emitter. So it starves itself. Saturation point is right where that curves starts. That's why it's OKAY to go into saturation but NOT OKAY to go into deep sat.

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  • \$\begingroup\$ I dont understand what you mean. According to the plot Ic is low but it should be maximum. Which one is right? \$\endgroup\$ – user16307 Dec 26 '15 at 8:20
  • \$\begingroup\$ I am afraid, you are misinterpreting the term "saturation". For FET´s the saturation region is the region with high (saturated) currents. But for BJTs this definition does NOT apply. In contrary, the saturation region is the region for low Vce values (and low currents) between Vce=0 and Vce app. 0.6V. \$\endgroup\$ – LvW Dec 26 '15 at 10:25
  • \$\begingroup\$ There's nothing wrong with going into deep saturation - can you explain what you mean? \$\endgroup\$ – Andy aka Dec 26 '15 at 11:09
  • \$\begingroup\$ @LvW So do you mean for BJTs saturation does not mean the Ic goes maximum? "low Vce values (and low currents)" You mean Ic is low. If so thats totally contrary what I understood from saturation. What I understand was it is the point where Ic cant go higher anymore what ever the base current is increased. I didnt get it. \$\endgroup\$ – user16307 Dec 26 '15 at 17:11
  • \$\begingroup\$ @Andyaka, the problem with deep saturation is quite simple. Your base becomes your carrier source, not your collector. That's why Ic drops off. A forward biased Vcb forces a high field with a small depletion region. The smaller the depletion region, the more area (volume) there is for diffusion. However large diffusion lengths lead to high recombination and low carrier injection. Ic will decrease in deep saturation. \$\endgroup\$ – Dave Dec 26 '15 at 19:30
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A switch only has two states, on and off. A transistor has two kinds of on, saturation and forward-active. In forward-active the transistor is limiting the current going into the collector and in saturation the voltage on the collector is limiting it (by not being high enough to effectively push current into the collector). Assuming the current will be highest in saturation because it is like a switch ignores the fact that you need some minimum voltage to push current through the transistor. If you don't provide that, either by not providing much voltage or putting a resistor that drops all the voltage before the current gets to the collector, the transistor will saturate. The switch analogy is good for understanding the second one, not so much for the first one.

I have never found looking at plots to be a good way of developing an intuitive understanding of how the transistor will behave. Think of it as current-limited switch, with the setpoint of the limit set by the base current (or in the case of MOSFETs, a equation based on Vds).

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My understanding of saturation is that an increase in the base current does not increase the collector current. I agree with @Austin that the plots are usually varying something else, making this property hard to see.

I think also there's a difference between applying a Vce of 0.2V from a voltage source, versus the usual case of having a higher voltage, in series with a load, and observing a Vce of 0.2V as a result of Ic, the collector current. The latter setup is how transistors are usually operated.

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  • \$\begingroup\$ In saturation region(where Vce<0.2V) the "beta" is much lower than in the active region(where Vce>0.2V); this makes Ic much smaller for a fixed base current in the saturation region. When one saturates transistor by achieving Vbe>=700mV, from now on the transistor will have a low beta since it is now in saturation region. So this beta should be used. That is what I understood so far. So when it comes to switching it indicates the Ic/Ib will be low(with zero Vce resistance) and in amplification this beta ratio will be high(but there will be Vce drop). \$\endgroup\$ – user16307 Dec 26 '15 at 20:48
  • \$\begingroup\$ So in a nutshell in BJT saturation means: Vce is going to less than 0.2V(goes to zero)! Vbe is going to 700mV and stays there! And beta is lower comparing to active region! I think it is done to supply the highest current to the load when Vce=0 --> Iload = Vcc/R, there is no voltage drop in transistor and max voltage can be applied now to the ends of the load terminals. \$\endgroup\$ – user16307 Dec 26 '15 at 20:55
  • \$\begingroup\$ Added another item to my answer. \$\endgroup\$ – gbarry Dec 27 '15 at 0:49

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