74154 is a TTL circuit, and TTL was designed to make the best use of non-ideal transistors. In the processes of the time, bipolar NPN transistors were fastest, so all TTL circuits were designed around those.
If you have some experience using BJTs you will know that NPN transistors are best used to pull a signal to 0V (common emitter, with the output connected to the collector) and quite weak at pulling a signal high. (Common collector, with the signal connected to the emitter, which remains at 0.7V lower than the base voltage, and therefore considerably below the supply rail.
So TTL circuitry adopted asymmetric logic levels, where '0' was guaranteed to be below 0.8V, and '1' was guaranteed to be above 2.4V, less than half the nominal 5V supply rail.
Likewise a TTL output was guaranteed to sink 16mA (for the 74 series, 8mA for 74LS, other families had their own IOL ratings) but only source 0.4 mA.
This carried through to the input current requirements : you could pull an input high with very little current (40uA), but it took 1.6mA to pull an input low (0.4mA for the later 74LS).
And this carried through to the way the logic was used, and designed with. Inputs were pulled high by default, and only pulled low when necessary, to save power. So you can use a 47 kilohm resistor to pull up ( drops 1.88V at 40 uA) and a switch to pull down - and that practice is still often seen today, in active-low reset circuits, though the symmetry of CMOS makes it unnecessary.
High speed signals were usually active low, for much the same reason. And that's what is going on with the 74154...