# How do TTL NAND gates work? This is supposed to be a simple NAND gate. I understand how the output is 1 if one of the inputs is zero but if both inputs are 1 then the base of Q1 is supposed to be zero. This is what I don't understand. I know that Q2 and Q3 will be in cut off so the base of Q1 is floating. If that is true, how is it zero then?When A and B are open does current flow through Q2 Q3 via R1 to turn on Q1?

• If both inputs are high, and the transistors are in cut-off, as you say, there is no current from collector to emitter, so the voltage at collector is the same as at the em miter. So the base of Q1 is high, so the output is low. Dec 29, 2015 at 19:39
• The best answer that I chose answers directly the point of confusion I had but also check other answers, they are useful Jan 6, 2016 at 11:59

I know that Q2 and Q3 will be in cut off so the base of Q1 is floating.

Incorrect. A BJT is also a pair of P-N junctions, so if the emitters of both Q2 and Q3 are high then current will flow from the bases to the collectors instead, turning Q1 on.

• Seven seconds... Dec 29, 2015 at 19:39
• @BrianDrummond Yeah what the hell. This must guy is probably the first general AI. Oct 17, 2019 at 2:13

I've redrawn the schematic in a way that is easier for me to understand. Perhaps it will help others. simulate this circuit – Schematic created using CircuitLab

When A and B are high, everything to the left of Q1's base can only lead back to Vdd. There's no path to ground at all. And thanks to Ignacio for pointing out the current from base to collector at Q2 and Q3 -- I've been looking at these "equivalents" since 1973 and never really understood what they were doing.

If both inputs are '1', then Q2,3 base-collector junctions are forward biassed, supplying current from R1 into Q1 base. Thus Q1 turns on.