(MULTISIM) Feeding sine wave into MOSFET - Getting modified sine wave on drain

I am trying do design a HF power supply/inverter for school. I stumbled across a problem.

When i feed a IRF740 a sine wave on the gate, the MOSFET gives a modified sine wave on the drain. Why is that? Can this be filtered?

Some screenshots of simulation:

The diodes and transformer are ideal.

• And what exactly about this is not what you expected? Commented Dec 29, 2015 at 22:29
• I expected a sine at the drain. Is this usual to happen? Commented Dec 29, 2015 at 22:31
• Yeah, for a whole lot more reasons than fit in a comment. I'm about to go to dinner, but I'll write up a proper answer when I get back. Commented Dec 29, 2015 at 22:34
• What is the Vth of your IRF740? And knowing that, when would you expect it to start conducting? Commented Dec 29, 2015 at 22:36
• At around 6V its starts conducting my desired current of around 10 amps Commented Dec 29, 2015 at 22:41

This sounds normal. Look carefully at how the FETs are biased. Almost certainly they don't stay in the linear region over the full range of input signal. Since you are getting blips, look closely at what is happening when the gate voltages are low. Probably the FETs are already mostly off with a gate voltage above the minimum, so lowering it doesn't cause much change on the output.

You said this for high frequency. Depending on how high "high" is, you actually want the FETs to turn off for part of each cycle, more like a class C amplifier than a class B. You then reduce the harmonics with a L-C tank on the output.

• I was not aware of this. I was treating the MOSFET like a standard bipolar transitor and expected it to behave like one. I guess it does not. The more you learn. The switching signal is a 10KHz 5Vrms sine wave. Commented Dec 29, 2015 at 22:47
• Note that 10kHz is inside the audible range. If you were to build this, you'd hear a slight high-pitched "whine" as it operated. Some people can hear up to 20kHz, so 30kHz or higher is typical to avoid this issue. Commented Dec 29, 2015 at 23:11

The gate source threshold voltage for an IRF740 is typically 3V. At this voltage, there will be about 250 micro amps flowing down the drain. By 4.5 volts this will have typically have risen to 700mA: -

With 5V on the gate you might expect to see nearly 3A flowing and at 5.5V on the gate you might expect a drain current of over 6A.

It's very non-linear and your driving sinewave for a lot of its cycle will be below the gate threshold hence you just see the tops of the sinewave in your picture: -

You've made it tad worse by using a diode in series with the gate drive voltage. This isn't needed because MOSFET gates don't care if they get reverse biased (absolute maximum rating for gate-source is +/- 20V).

What I'd suggest doing is driving the two gates from a transformer with a cetre-tap and bias that centre-tap at maybe 2 to 3V and feed a single sinewave into the primary - then look at your simulation results to see the improvement.

• Nice! That got rid of the chopping, now I'm getting clipping on the top part of the output. Ugh. What i did was add a 3V DC Offset to the triggers and remove the diodes. Commented Dec 29, 2015 at 23:37
• Where is the output in the circuit and what voltage does it clip at. Also the transformer - is it modelled around a particular core type? Also, if you changed the frequency to 20kHz does it get better? Commented Dec 29, 2015 at 23:41