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Transistors, bjt, MOSFETs OK got it. More transistors = better computing got it.

But compressing the transistors closer to each in my mind only helps reduce the physical dimensions.

So does a CPU or any electronic become more efficient because the transistors use less voltage? Does more computing reduce power usage, thus simply having more transistors the reason?

I am asking because as a newb and soon to graduate engineer, I think basic stuff like this is important to understand. But I always learned this concept as a rule of thumb and not by "first principle" or actual theory of transistor efficiency.

PS I did take a class in where the math of L and W was calculated and compared to new L' and W', reduced on a npn. The theoretical frequency increased but I don't think the math translation well in my head because I don't see how that helps power efficiency, only performance and/or area.

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3 Answers 3

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Most of the power consumption in CMOS circuits is 'dynamic power' -- power from devices switching state. This power is basically the power required to drive the capacitance of the other gates, as well as the capacitance of the wiring.

In modern CMOS, there is additional static leakage power because when the MOS transistor is 'off', it still allows a little leakage current to flow, and given the numbers of devices in a modern CPU, the total current becomes significant. There are techniques to minimize this though.

As devices get smaller, you get a number of benefits:

  1. Device capacitances decrease, so less power is required to drive this capacitance.
  2. Devices are smaller and closer together, so parasitic capacitance of the wiring also decreases.
  3. Devices can be made operate at lower supply voltages, so both leakage current, and power required to drive parasitic capacitances decreases.

Generally, the leakage currents increase as devices get smaller (not really because they are smaller, but because the lower threshold voltages allow higher leakages). More complex power-switching techniques are used to keep this in check.

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  • \$\begingroup\$ Thank You! Listing the effects definitely made it so clear how the benefits are cascading. \$\endgroup\$
    – Cit5
    Commented Jan 3, 2016 at 11:27
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The dynamic power consumption is caused by gate capacitances charging and discharging. The power is proportional to C * F * V^2. C is gate (or process) capacitance, F is frequency and V is voltage. Since the V term is squared, reducing voltage greatly reduces power consumption.

Smaller, lower-voltage transistors have thinner insulation layers at the gate, so they have more static current leakage (even though the material is a good insulator, the path is very short, so there is some leakage). I remember at one time, maybe around 2000, there was talk that static and dynamic power would cross over, and the static would become more significant than dynamic for high-end processors (intel PC's and such). I think they figured out tricks for reducing static power, though. And I sort of stopped paying attention to that area of industry.

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  • \$\begingroup\$ Thank you for the equation reminder as well. Sometimes basic physics and math can help picture the big drop in power. I don't know why I didn't think of gate capacitance. \$\endgroup\$
    – Cit5
    Commented Jan 3, 2016 at 11:25
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Up to a limit, smaller transistors helps to reduce voltage drive requirements because your gate oxide is thinner and therefore the gate control is stronger due to the gate being closer to the channel.

Smaller transistors also helps reduce capacitance which results in lower dynamic drive current.

Both voltage and current being lower results in lower power requirements.

The limitation of this scaling is when your gate oxide thickness is so thin that quantum tunneling occurs and the channel length is so short that you have to battle short channel effects.

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