I'm designing a board which uses a chip antenna. According to the datasheet, there should be no copper on all layers under the antenna. There's also should be some ground plane on the top layer with a know distance between the plane and the chip.

My question is : what about power and bottom layers ? Should I add a ground band around the clear area or should I just do nothing ?

Datasheet : http://www.mouser.com/ds/2/276/0479480001_ANTENNAS-701294.pdf (link to app notes and other relateds in the top of the datasheet)

  • \$\begingroup\$ You should do whatever your design tool requires to produce a board with no copper on any layer under the antenna. \$\endgroup\$
    – The Photon
    Commented Jan 7, 2016 at 19:11
  • \$\begingroup\$ A "keepout" zone for each layer is a good idea if your EDA software supports it. \$\endgroup\$
    – rdtsc
    Commented Jan 8, 2016 at 6:57
  • \$\begingroup\$ @ThePhoton and rdsc : Yes sure, but should I add some ground around the keepout on power and bottom layer ? \$\endgroup\$
    – Julien
    Commented Jan 8, 2016 at 6:58

1 Answer 1


You should maintain the prescribed keepout zone on all layers1. You will need a ground copper pour for the matching network on the top layer near the antenna. It should be "stitched" with vias to the inner layer ground plane.

My gut feeling tells me that it's not a bad idea to have ground on every layer around the keepout zone. I would make a via "fence" around the keepout zone.

1 What ThePhoton said in his comment.

2 Molex app note for this antenna.

3 I'm not an RF and antenna expert. An actual RF speciallist can do this question better justice. I'm writing this answer only as a fallback.


Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.