Details on PCB layout for microcontroller

Question

Update: the follow-up question shows my take on the resulting PCB layout.

I'm laying out my first board with a uC (I've got a reasonable amount of experience in using and programming embedded systems, but this is the first time I'm doing the PCB layout), an STM32F103, this will be a mixed-signal board using both the internal DACs of the STM and some external DACs via SPI, and I'm a bit confused about the grounding.

The answers to these questions:

• Decoupling caps, PCB layout
• Competing PCB Crystal layout recommendations
• Mixed signal PCB layout for PSoC

clearly state that I should have a local ground plane for the uC, connected to the global ground at exactly one point, and a local power net, connected to the global power near that same point. So this is what I'm doing. My 4 layer stack is then:

• local GND plane + signals, uC, it's 100nF decoupling caps, and the crystal
• global GND, unbroken except for vias. In accordance to sources such as Henry Ott, the ground plane is unsplit, with the digital and analog sections physically separated.
• power, a 3.3V plane under the IC, thick traces for the 3.3V external DACs, thicker traces for distributing the \$\pm15\$ volts in the analog section.
• signal + 1uF decoupling caps

Further away on the board the analog components and signals are on the top and bottom layers.

So the questions:

1. should I break the global ground under the uC, or is it good to have the full ground plane under the local one?
2. Power plane: I'm intending to have a power plane only under the uC and use vias to bring the power to the decoupling caps and therefore the uC on the top layer, as I can't really use one much elsewhere. The external DAC's should be star distributed, so I have separate tracks for them, and the rest of the board is \$\pm15\$ volts. Does this sound ok?
3. I'm using both the ADC and DAC of the uC, and generating a reference voltage in the analog section of the board, which I bring to the Vref+ pin of the uC with a track on the power plane. Where should I connect the Vref- pin: local ground, global ground, or make a separate track on the power plane connecting it to the global ground in the analog section, where the ground should be quiet? Maybe near to where the reference voltage is generated? Note that on the STM32 the Vref- is distinct from the analog ground VSSA pin (which I suppose goes to the local GND plane?).

Any other comments on the design here are of course welcome too!

Answer 1

You don't necessarily need a local ground plane for the micro. The local ground can be a star with the central point under the micro, which is where this star is connected back to the main ground, for example.

If you have at least 4 layers, then it can make sense to dedicate one of the layers in the immediate vicinity of the micro to a local ground. If this makes routing too hard or this is a two layer board, just use the star configuration. The main point is to keep the high frequency power current drawn by the micro off the main ground plane. If you don't do that, you have a center-fed patch antenna instead of a ground plane.

The loop from micro power pin, to bypass cap, to micro ground pin should not cross the main ground plane. This is where the high frequency power currents will run. Connect the ground pin to the main ground in one place, but do not connect the ground side of the bypass cap to the main ground separately. The ground side of the bypass cap should have its own connection back to the micro's ground pin.

Digital signals going between the micro and other parts of the board will still have small loop area because the micro will be connected to the main ground close to its ground pin.

Answer 2

1. No, you should not. And get rid of the so called "local ground". What do you think is happening with all the digital signals when you implement this local ground? You should find the answer in Henry Ott's article that you linked, Figure 1.

   Sure, you do have a connection between local ground and the ground plane, but all you do is increase the loop area, essentially turning your trances into small antennae.

2. That sounds fine.

3. The reference manual says that V_REF- must be connected to V_SSA which in turn must be connected to V_SS. I suggest that you just connect the V_REF- directly to ground and try to keep digital currents out of the way using clever placement.

As for the suggestions, if 1uF caps are the only components you plan to place on the bottom, I recommend that you place them on top. When you have components on both sides, the manufacturer either has to run the board through the oven twice, or solder the components by hand. Both of which will increase the manufacturing cost.

Answer 3

You may find this answer useful.

There are a very few times I use truly separate planes (such applications still exist), but not for a circuit such as yours.

Careful placement of components and a bit of thought on the power / ground should help you achieve a good layout.