# pic32 maximum external frequency while running from internal 8MHz RC oscillator

I am completely new to PICs and I have never worked with a part as complex as this. In particular, I'm wondering if it is possible to generate a reference clock (REFCLKO in the datasheet) at 11.2896 MHz while running on the internal 8MHz oscillator (the 8MHz is boosted by a PLL up to 40 MHz which is the core clock). I tried doing this and I looked on the scope only to find that this synthesized waveform had very apparent jitter (measured 25 ns = 1/40MHz jitter) and the frequency didn't look correct. Slowing REFCLKO down to speeds lower than 8MHz resulted in a nice waveform.

It seems logical to me that you could use the provided registers to derive a 11.2896 MHz clock on REFCLKO from the 40 MHz core frequency. Why does this not work correctly? Will I need an external crystal oscillator with frequency greater than 11.2896 MHz to make this work?

I saw a blog post on eev blog that said something to the effect of: even though the core frequency is boosted up to 40 MHz from 8 MHz, the maximum possible external frequency is 8 MHz, but there was no explanation as to why. Please help!!!

EDIT:

It appears that the frequency of REFCLK is not limited to 8 MHz, but rather the frequency is unstable if the ROTRIM register is nonzero. the ROTRIM sets the fractional part of the divider. This way I can get a stable 10 MHz (40 MHz divided by 4.0) clock for example, but fine tuning with a fractional divider results in a bad waveform.

• Why not run the PIC at that speed or half that speed? Jan 10, 2016 at 8:14
• can you elaborate ?
– alex
Jan 10, 2016 at 8:38
• As this is an audio application, given that clock frequency, don't mess about with PLLs, go straight to an 11.2896 MHz crystal - either on the PIC or an external oscillator - now. Jan 10, 2016 at 10:40
• You can't generate that frequency directly from a 40MHz clock so the generator needs to lose and gain base time periods from the high and low periods of the generated clock, resulting in a jittery, asymmetric waveform. Jan 10, 2016 at 20:31
• If you're looking for exactly 11.2896 MHz then I don't see how anything based on the internal oscillator is going to work for you, because it's only accurate within 1%. Can you tolerate 11.2896 MHz +/- 1%? Jan 21, 2016 at 13:21

## 1 Answer

As @Brian Drummond suggests... don't even consider REFCLKO for an application which demands exacting timing specifications (while being over the core clock speed, AND at an odd interval, AND when running from the internal clock source!)

You likely haven't seen much about this because it just isn't done in practice. Yes, the device may boost an 8MHz reference to 40MHz internally - but as @Ignacio explains, REFCLKO can only approximate 11.2896MHz using ROTRIM - and erattically at that - so there will be jitter and lots of it.

I know, it's tempting to want this one PIC to "do it all." But in this case, it really is a much better idea to use a \$0.39 xtal, resonator, etc. for that other device, which you know will be within a specified ppm. Or better yet, use a multiple of this into the PIC directly, and feed (an even) division of it out to that device. Then everything is synched.

Also note that the spec for a typical PIC32MZ0512EFE064 CLKO stability is $\pm0.25$% and next page, the FRC stability is $\pm$5% and LPRC is even worse. So even if it could output a jitter-free 11.2896MHz, there is no guarantee it wouldn't be $\pm$5%, even 15% or more out if using the FRC or LPRC, and 0.5% if using a reference oscillator.