I would like to model a clock signal with an drift parameter in my digital simulation.

The current implementation handles:

  • frequency / period
  • phase -360.0 .. 360.0 degree
  • duty cycle 0.0 .. 1.0

Unimplemented properties:

  • drift
  • jitter

For clock domain crossing circuits, I would like to implement a primary (stable) and secondary (drifting) clock. I know that my digital model can not handle metastabiliy problems -- that not my goal at all -- but I could detect handshake errors.

*Clock drift is not jitter. Clocks running at the same speed may varie in sub percent ranges, so one circuit is running a bit faster.*

Most documents have only ratings for jitter, on the other hand transceivers, like in FPGAs, have phase compensation units which do phase correction automatically. I can't find a max value for them ...

So my questions are: - Is it an absolut or relative value? - If relative, relative to what: one cycle, 1 second, ...?

If someone has suggestion on how to model jitter, it will be welcome too :).

  • 1
    \$\begingroup\$ Given drift is just the frequency being slightly different from what it should be - e.g. if you run one clock at 2MHz and the second at 2.00001MHz, the two will drift in and out of phase - surely you just need to change the adjust the frequency of the second clock by some fixed amount (i.e. a \$\Delta f\$). \$\endgroup\$ – Tom Carpenter Jan 23 '16 at 19:52
  • \$\begingroup\$ Yes, that's an alternative solution, but still leaves me at the problem clock_freq2 := clock_freq1 * x and how is x measured. I want that a user can input a "common unit" for x and the code calculates the rest: e.g. with your fomula. \$\endgroup\$ – Paebbels Jan 23 '16 at 20:02
  • \$\begingroup\$ You could do simply \$f_2 = f_1 + \Delta f\$, thus \$\Delta f\$ keeps the units of Hz. If you go with \$f_2 = f_1 \times X\$, then \$X\$ is unitless, it's simply a scale factor, which would also be fine. \$\endgroup\$ – Tom Carpenter Jan 23 '16 at 20:03

How you measure drift depends what effects you're modelling.

Crystal oscillators tend to specify fractional deviation of the frequency, usually in "ppm" or parts per million. They often specify (or give typical values for) the drift due to temperature and due to aging. For example a drift of 25 ppm per year, means that after a year the frequency might be anywhere from 0.999975 to 1.000025 of what it was initially.

Communications systems often specify clock wander in terms of unit intervals (UI). Wander measures clock drift over intervals much larger than the baud interval. For example, the clock drift after several milliseconds or longer, for a 1 Gb/s system. A wander of one UI means the clock phase has shifted by one full baud interval. The value specified might be the rms of a statistical variation or it might be a maximum limit.

  • \$\begingroup\$ I think wander is the right name for what I want to model. Something like a shift of 1 UI after 1000 cycles. So for a cross clock fifo there is potential error situation every 1000 test cycles (I know it's (10**9 or even more) faster than in the real world. \$\endgroup\$ – Paebbels Jan 23 '16 at 19:57

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