Attached here below is the input and out put sequence that I am trying to achieve with a timing circuit. This looks like something that might be achieved with a few monostable 555 timers, but I am struggling with triggering on both sides of the input pulse. The input pulse could be inverted, but since I need to trigger on both sides (positive and negative edge), I'm still in the same situation. Any suggestions would be most appreciated. The supply voltage is 12 Volts.
This circuit will generate a ~10usec negative-going trigger pulse on each side of an input pulse, which you can use to trigger your 555 monostable multivibrator:
It will operate directly from 12V, using 1/4 of a CD4077 ex-NOR gate.
The input pulse should be reasonably clean and (more importantly) have reasonably fast rise and fall times. If that isn't true, square it up with a gate or two from the 4077 package or even a Schmitt trigger chip.
It works by delaying one of the input signals by the R1 C1 time constant, so the inputs to the exclusive-NOR gate are briefly different from each other on both the rising and the falling input edges.
Recalling the truth table for an ex-NOR gate, we can see that the result is that the output is high, with a brief negative-going pulse at each input edge:
As someone has already mentioned in a comment, this could easiest be done with a microcontroller, like a PIC16. You would need to level-convert the input down to 5v (or 3.3v) and then use a couple of output transistors to convert back to 12V outputs if necessary. But that has a lot of prerequisites; you need to be able to program and have a tool chain installed along with a programming device.
If you want to use discrete components, the following circuit should do what you want. You don't need to worry about whether you are triggering on the positive or negative edge of the input, since just adding an inverter as shown below will handle that for you.
How it works. 555's trigger on the negative edge. So the top 555 with the 3 second delay will trigger at the end of the input TRIGGER pulse, extending it by 3 seconds (it's output OR'ed with the input TRIGGER) to create OUTPUT 1.
The 100 ns delay line is there to avoid any glitches on the output when switching from one input to the other of the OR gates. This delay (which can probably be as low as 20 ns) could be a series of say four inverters, or a real delay chip like the DS1100.
Because of the inverter, the middle 555 with a 1 second delay triggers off the positive edge of the input. It is then used to inhibit the output of the TRIGGER input for 1 second (using the inverter and AND on the output). Then the bottom 555 with a 2 second delay extends the input TRIGGER by two seconds, like the first circuit, to create OUTPUT 2..
I haven't shown the circuitry for the timing components of the 555's, these are readily available on the web.
I would level-convert the input down to 5v using a voltage divider so you can use standard logic gates like the 74HTC04 for the inverters, 74HCT32 for the ORs gates, and 74HCT08 for the AND gate, and then use two more inverters and transistors to convert back to 12V outputs if necessary. If the input is noisy, you could use 74HCT14 instead of the 74HCT04 inverters.
Figure 1. Time delays using CD4093 Schmitt triggers.
- When Trig goes high NAND1 goes low. D1 discharges C1 immediately setting NAND2 high.
- When Trig goes low NAND 1 goes high charging up C1 through R1. After time-constant set by R1.C1 NAND 2 goes low.
Same principle of operation as OUT 1 but with a delay on the input to NAND3.
Any Schmitt trigger chip will do - inverter, NAND, NOR, etc.