# Questions about Dry EEG electrode interfacing circuit

I have finished reading a paper about developing an interfacing circuit for Dry EEG electrodes and there is a few points that I couldn't understand.

1. To mask the diode’s parasitic capacitance and conductance,Cb(2.2μF)bootstraps the input for input frequencies higher than1/2πRbCb Hz, thus preserving the amplifier’s high input impedance while achieving lower noise levels than what is possible with a purely resistive bias.

how the diodes and DC bias current circuit could decrease the input impedance? and How Cb will "deny" this and reduce the noise levels?

1. For true common-mode components in the input, the current through Rf is zero, so that common-mode signals are absent in the amplified differential signal at the ADC input.

Why is the current through Rf is zero?

1. The second operational amplifier (OA2) serves as a buffer to drive the active shield and bootstraps the biasing network

What is the bold sentence mean?

1. Since all op amps are negative feedback and the inverting pin of OA1 is connected with the non inverting pin of OA2, Could we consider that all voltage pins of op amps are equal?

Link of The op amp data sheet. Vcm is the average voltages of all EEG electrodes For question 1: $V_S^i$ will appear at the negative terminal of OA2. At high frequency, the impedance of $C_b$ is low, so the voltage on both sides of the diodes approach the same value, thus this is no current, an effectively high input impedance. For low frequencies, input that differs by more than a diode drop from $V_{bias}$ will cause current through at least one of the diodes.
For question 2: For true common mode signals, $V_s^i = V_{cm}$. Thus, $V_{cm}$ also appears at the negative input of OA1. With the same voltage at both ends of the series combo of Rf and Cf, there is no current.