I am working with ADC 11040K with 1 kHz (1/1kHz = 1ms conversion time) sampling frequency. I am confused with timing diagram of its data conversion. As you can see the image, which duration is equal to 1 ms? DeltaT_1 or DeltaT_2? And Could you explain your answer briefly? 
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\$\begingroup\$ Why not try referring to actual timing diagrams in the data sheet? \$\endgroup\$– Andy akaCommented Feb 2, 2016 at 15:43
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\$\begingroup\$ Also, you are aware that it is a delta sigma ADC and that it most likely will be used in continuous operation (CS permanently low)? \$\endgroup\$– Andy akaCommented Feb 2, 2016 at 15:47
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\$\begingroup\$ @Andyaka not necessarily, this type of ADC can be set in "continuous conversion" and the DRDY/IRQ line indicates a new result in the buffer, you can query the buffer at your leisure before the next conversion completes. Problems can occur when you do not time against DRDY and you ask for a result while it is in the middle of updating a conversion or a conversion completes while it is shifting out thiedata, I have had various intermittent bitflip issues caused by polling ADC's without interrupts. \$\endgroup\$– crasicCommented Feb 2, 2016 at 21:47
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1 Answer
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From the data sheet (p. 17 at the top) "With DRDYIN low, a falling edge at the data-ready signal output (DRDYOUT) indicates that new conversion results are available for reading in the 96-bit data register."
Delta 2, would indicate sampling frequency, as the data in the register isn't ready to serve unless the chip sends the signal that the data is ready.
